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authorWen He <wen.he_1@nxp.com>2019-09-10 10:59:13 +0300
committerLiviu Dudau <liviu.dudau@arm.com>2019-10-08 18:13:36 +0300
commitd298e6a27a81362af4b755db2e89469c2a609cd8 (patch)
tree7ee233b3966bedc8fd8e14c3428354ed61057635 /drivers/gpu/drm/arm/malidp_regs.h
parent354c2d310082d1c384213ba76c3757dd3cd8755d (diff)
downloadlinux-d298e6a27a81362af4b755db2e89469c2a609cd8.tar.xz
drm/arm/mali-dp: Add display QoS interface configuration for Mali DP500
Configure the display Quality of service (QoS) levels priority if the optional property node "arm,malidp-aqros-value" is defined in DTS file. QoS signaling using AQROS and AWQOS AXI interface signals, the AQROS is driven from the "RQOS" register, so needed to program the RQOS register to avoid the high resolutions flicker issue on the LS1028A platform. Signed-off-by: Wen He <wen.he_1@nxp.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190910075913.17650-2-wen.he_1@nxp.com
Diffstat (limited to 'drivers/gpu/drm/arm/malidp_regs.h')
-rw-r--r--drivers/gpu/drm/arm/malidp_regs.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/arm/malidp_regs.h b/drivers/gpu/drm/arm/malidp_regs.h
index 993031542fa1..514c50dcb74d 100644
--- a/drivers/gpu/drm/arm/malidp_regs.h
+++ b/drivers/gpu/drm/arm/malidp_regs.h
@@ -210,6 +210,16 @@
#define MALIDP500_CONFIG_VALID 0x00f00
#define MALIDP500_CONFIG_ID 0x00fd4
+/*
+ * The quality of service (QoS) register on the DP500. RQOS register values
+ * are driven by the ARQOS signal, using AXI transacations, dependent on the
+ * FIFO input level.
+ * The RQOS register can also set QoS levels for:
+ * - RED_ARQOS @ A 4-bit signal value for close to underflow conditions
+ * - GREEN_ARQOS @ A 4-bit signal value for normal conditions
+ */
+#define MALIDP500_RQOS_QUALITY 0x00500
+
/* register offsets and bits specific to DP550/DP650 */
#define MALIDP550_ADDR_SPACE_SIZE 0x10000
#define MALIDP550_DE_CONTROL 0x00010