summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h
diff options
context:
space:
mode:
authorDillon Varone <dillon.varone@amd.com>2024-08-01 22:38:34 +0300
committerAlex Deucher <alexander.deucher@amd.com>2024-08-13 17:44:50 +0300
commit7a1eb66809390d06b744aa13123b925b64b54c4c (patch)
treea69df38bb0ffe24ff4e13bd11c29718a27c90028 /drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h
parent67ea53a4bd9d03a85eecd99875a2a794c886f788 (diff)
downloadlinux-7a1eb66809390d06b744aa13123b925b64b54c4c.tar.xz
drm/amd/display: Perform outstanding programming on full updates
[WHY] In certain scenarios DC can internally trigger back to back full updates which will miss some required programming that is normally deferred until post update via optimize_bandwidth. [HOW] In back to back update scenarios, wait for pending updates to complete and perform any strictly required outstanding programming. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h
index f50b2955ce8c..326854489802 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h
@@ -459,6 +459,8 @@ struct hw_sequencer_funcs {
bool enable);
void (*fams2_global_control_lock_fast)(union block_sequence_params *params);
void (*set_long_vtotal)(struct pipe_ctx **pipe_ctx, int num_pipes, uint32_t v_total_min, uint32_t v_total_max);
+ void (*program_outstanding_updates)(struct dc *dc,
+ struct dc_state *context);
};
void color_space_to_black_color(
@@ -519,6 +521,21 @@ void hwss_build_fast_sequence(struct dc *dc,
struct dc_stream_status *stream_status,
struct dc_state *context);
+void hwss_wait_for_all_blank_complete(struct dc *dc,
+ struct dc_state *context);
+
+void hwss_wait_for_odm_update_pending_complete(struct dc *dc,
+ struct dc_state *context);
+
+void hwss_wait_for_no_pipes_pending(struct dc *dc,
+ struct dc_state *context);
+
+void hwss_wait_for_outstanding_hw_updates(struct dc *dc,
+ struct dc_state *dc_context);
+
+void hwss_process_outstanding_hw_updates(struct dc *dc,
+ struct dc_state *dc_context);
+
void hwss_send_dmcub_cmd(union block_sequence_params *params);
void hwss_program_manual_trigger(union block_sequence_params *params);