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authorAlex Deucher <alexander.deucher@amd.com>2025-07-11 20:21:46 +0300
committerAlex Deucher <alexander.deucher@amd.com>2025-07-16 23:09:48 +0300
commit290ccae52dcff890c2b9fd9a9862c08598f5ed8f (patch)
tree8e9a409c5b2b2716ae83e1de17e64e03fa460c01 /drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
parent94ee19ea149f3d9ffc4baa8a7977c1aa8b878f8e (diff)
downloadlinux-290ccae52dcff890c2b9fd9a9862c08598f5ed8f.tar.xz
drm/amdgpu/vcn: don't enable per queue resets on SR-IOV
Power control is only available in bare metal. SR-IOV will need a different method. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
index 5bbce8544fef..e6613246d8b8 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
@@ -241,7 +241,8 @@ static int vcn_v4_0_sw_init(struct amdgpu_ip_block *ip_block)
adev->vcn.supported_reset =
amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]);
- adev->vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+ if (!amdgpu_sriov_vf(adev))
+ adev->vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
if (amdgpu_sriov_vf(adev)) {
r = amdgpu_virt_alloc_mm_table(adev);