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authorAlex Deucher <alexander.deucher@amd.com>2022-05-05 06:24:00 +0300
committerAlex Deucher <alexander.deucher@amd.com>2022-05-06 23:56:57 +0300
commitbf1781e17f30a594f959671af59a253e9313a9b9 (patch)
tree9d7f25cc5234e90d102b0c2a57ded8dd3bdd1a72 /drivers/gpu/drm/amd/amdgpu/nv.c
parent98f561884683cdca65bec80ef4dddfc3fe7aca63 (diff)
downloadlinux-bf1781e17f30a594f959671af59a253e9313a9b9.tar.xz
drm/amdgpu: simplify nv and soc21 read_register functions
Check of the base offset for the IP exists rather than explicitly checking for how many instances of a particular IP there are. This is what soc15.c already does. Expand this to nv.c and soc21.c. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/nv.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/nv.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 8ecfd66c4cee..d016e3c3e221 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -392,9 +392,9 @@ static int nv_read_register(struct amdgpu_device *adev, u32 se_num,
*value = 0;
for (i = 0; i < ARRAY_SIZE(nv_allowed_read_registers); i++) {
en = &nv_allowed_read_registers[i];
- if ((i == 7 && (adev->sdma.num_instances == 1)) || /* some asics don't have SDMA1 */
- reg_offset !=
- (adev->reg_offset[en->hwip][en->inst][en->seg] + en->reg_offset))
+ if (adev->reg_offset[en->hwip][en->inst] &&
+ reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
+ + en->reg_offset))
continue;
*value = nv_get_register_value(adev,