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authorLijo Lazar <lijo.lazar@amd.com>2025-04-11 14:15:46 +0300
committerAlex Deucher <alexander.deucher@amd.com>2025-05-08 18:21:37 +0300
commitafc6053d4c4b0a6be500b9e643aa17221e93a57b (patch)
tree0b763c8e404ac7cccce8432519c18f1a3b8c52ec /drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c
parentdbc064adfcf9095e7d895bea87b2f75c1ab23236 (diff)
downloadlinux-afc6053d4c4b0a6be500b9e643aa17221e93a57b.tar.xz
Reapply: drm/amdgpu: Use generic hdp flush function
Except HDP v5.2 all use a common logic for HDP flush. Use a generic function. HDP v5.2 forces NO_KIQ logic, revisit it later. Reapply after fixing up an HDP regression. v2: merge the fix (Alex) Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c18
1 files changed, 1 insertions, 17 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c
index 2c9239a22f39..ed1debc03507 100644
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c
@@ -27,22 +27,6 @@
#include "hdp/hdp_7_0_0_sh_mask.h"
#include <uapi/linux/kfd_ioctl.h>
-static void hdp_v7_0_flush_hdp(struct amdgpu_device *adev,
- struct amdgpu_ring *ring)
-{
- if (!ring || !ring->funcs->emit_wreg) {
- WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
- /* We just need to read back a register to post the write.
- * Reading back the remapped register causes problems on
- * some platforms so just read back the memory size register.
- */
- if (adev->nbio.funcs->get_memsize)
- adev->nbio.funcs->get_memsize(adev);
- } else {
- amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
- }
-}
-
static void hdp_v7_0_update_clock_gating(struct amdgpu_device *adev,
bool enable)
{
@@ -142,7 +126,7 @@ static void hdp_v7_0_get_clockgating_state(struct amdgpu_device *adev,
}
const struct amdgpu_hdp_funcs hdp_v7_0_funcs = {
- .flush_hdp = hdp_v7_0_flush_hdp,
+ .flush_hdp = amdgpu_hdp_generic_flush,
.update_clock_gating = hdp_v7_0_update_clock_gating,
.get_clock_gating_state = hdp_v7_0_get_clockgating_state,
};