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authorKuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>2017-04-14 20:29:25 +0300
committerLinus Walleij <linus.walleij@linaro.org>2017-04-24 16:14:17 +0300
commit7c2d176fe3f8dce632b948f79c7e89916ffe2c70 (patch)
tree87feb8544d8906b043f53213fbfe22e54d13accb /drivers/gpio
parent5664aa1c9ef59895eee1af15e36140d09d20714d (diff)
downloadlinux-7c2d176fe3f8dce632b948f79c7e89916ffe2c70.tar.xz
gpio: gpio-wcove: fix irq pending status bit width
Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO pins. But when checking for the pending status, for_each_set_bit() uses bit width of 7 and hence it only checks the status for first 7 GPIO pins missing to check/clear the status of rest of the GPIO pins. This patch fixes this issue. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-wcove.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
index 97613de5304e..bf7b71d7cf5b 100644
--- a/drivers/gpio/gpio-wcove.c
+++ b/drivers/gpio/gpio-wcove.c
@@ -317,7 +317,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
while (pending) {
/* One iteration is for all pending bits */
for_each_set_bit(gpio, (const unsigned long *)&pending,
- GROUP0_NR_IRQS) {
+ WCOVE_GPIO_NUM) {
offset = (gpio > GROUP0_NR_IRQS) ? 1 : 0;
mask = (offset == 1) ? BIT(gpio - GROUP0_NR_IRQS) :
BIT(gpio);