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| author | Madalin Bucur <madalin.bucur@oss.nxp.com> | 2020-01-22 16:20:29 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2020-01-23 23:17:13 +0300 |
| commit | 1d3ca681b9d9575ccf696ebc2840a1ebb1fd4074 (patch) | |
| tree | efe5bad889fccc2c8044619e568407517721017d /drivers/fpga/fpga-mgr.c | |
| parent | 73d527aef68f7644e59f22ce7f9ac75e7b533aea (diff) | |
| download | linux-1d3ca681b9d9575ccf696ebc2840a1ebb1fd4074.tar.xz | |
net/fsl: treat fsl,erratum-a011043
When fsl,erratum-a011043 is set, adjust for erratum A011043:
MDIO reads to internal PCS registers may result in having
the MDIO_CFG[MDIO_RD_ER] bit set, even when there is no
error and read data (MDIO_DATA[MDIO_DATA]) is correct.
Software may get false read error when reading internal
PCS registers through MDIO. As a workaround, all internal
MDIO accesses should ignore the MDIO_CFG[MDIO_RD_ER] bit.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/fpga/fpga-mgr.c')
0 files changed, 0 insertions, 0 deletions