diff options
| author | Qiuxu Zhuo <qiuxu.zhuo@intel.com> | 2022-07-23 02:33:35 +0300 |
|---|---|---|
| committer | Tony Luck <tony.luck@intel.com> | 2022-09-23 22:33:08 +0300 |
| commit | 14646de48bd77947cd6a325b42eecddcec5a35c7 (patch) | |
| tree | 812ee796f19b4586c4a457f9f7ea25ce181868ac /drivers/edac/skx_common.c | |
| parent | d5e4eeea0c20b7467458cf3f3d887f59075db93e (diff) | |
| download | linux-14646de48bd77947cd6a325b42eecddcec5a35c7.tar.xz | |
EDAC/skx_common: Add ChipSelect ADXL component
Each pseudo channel of HBM has its own retry_rd_err_log registers.
The bit 0 of ChipSelect ADXL component encodes the pseudo channel
number of HBM memory. So add ChipSelect ADXL component to get HBM
pseudo channel number.
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/all/20220722233338.341567-1-tony.luck@intel.com
Diffstat (limited to 'drivers/edac/skx_common.c')
| -rw-r--r-- | drivers/edac/skx_common.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/edac/skx_common.c b/drivers/edac/skx_common.c index 7276ce3a33e1..f0f8e98f6efb 100644 --- a/drivers/edac/skx_common.c +++ b/drivers/edac/skx_common.c @@ -27,9 +27,11 @@ static const char * const component_names[] = { [INDEX_MEMCTRL] = "MemoryControllerId", [INDEX_CHANNEL] = "ChannelId", [INDEX_DIMM] = "DimmSlotId", + [INDEX_CS] = "ChipSelect", [INDEX_NM_MEMCTRL] = "NmMemoryControllerId", [INDEX_NM_CHANNEL] = "NmChannelId", [INDEX_NM_DIMM] = "NmDimmSlotId", + [INDEX_NM_CS] = "NmChipSelect", }; static int component_indices[ARRAY_SIZE(component_names)]; @@ -139,10 +141,13 @@ static bool skx_adxl_decode(struct decoded_addr *res, bool error_in_1st_level_me (int)adxl_values[component_indices[INDEX_NM_CHANNEL]] : -1; res->dimm = (adxl_nm_bitmap & BIT_NM_DIMM) ? (int)adxl_values[component_indices[INDEX_NM_DIMM]] : -1; + res->cs = (adxl_nm_bitmap & BIT_NM_CS) ? + (int)adxl_values[component_indices[INDEX_NM_CS]] : -1; } else { res->imc = (int)adxl_values[component_indices[INDEX_MEMCTRL]]; res->channel = (int)adxl_values[component_indices[INDEX_CHANNEL]]; res->dimm = (int)adxl_values[component_indices[INDEX_DIMM]]; + res->cs = (int)adxl_values[component_indices[INDEX_CS]]; } if (res->imc > NUM_IMC - 1 || res->imc < 0) { |