diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2015-10-13 20:09:19 +0300 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2015-10-31 05:02:43 +0300 |
| commit | df5c7386f62d2db95ca48005087195e9a15e2b1f (patch) | |
| tree | cd017e1d7050b7fd44ee4db9e728e193afc83b99 /drivers/dma | |
| parent | 175267b389f781748e2bbb6c737e76b5c9bc4c88 (diff) | |
| download | linux-df5c7386f62d2db95ca48005087195e9a15e2b1f.tar.xz | |
dmaengine: dw: some Intel devices has no memcpy support
Provide a flag to choose if the device does support memory-to-memory transfers.
At least this is not true for iDMA32 controller that might be supported in the
future. Besides that Intel BayTrail and Braswell users should not try this
feature due to HW specific behaviour.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma')
| -rw-r--r-- | drivers/dma/dw/core.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index f16d1ed99ba9..41e9554b884d 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -1541,6 +1541,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata) /* Fill platform data with the default values */ pdata->is_private = true; + pdata->is_memcpy = true; pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING; pdata->chan_priority = CHAN_PRIORITY_ASCENDING; } else if (pdata->nr_channels > DW_DMA_MAX_NR_CHANNELS) { @@ -1653,10 +1654,13 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata) dma_writel(dw, CLEAR.DST_TRAN, dw->all_chan_mask); dma_writel(dw, CLEAR.ERROR, dw->all_chan_mask); - dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask); + /* Set capabilities */ dma_cap_set(DMA_SLAVE, dw->dma.cap_mask); if (pdata->is_private) dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask); + if (pdata->is_memcpy) + dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask); + dw->dma.dev = chip->dev; dw->dma.device_alloc_chan_resources = dwc_alloc_chan_resources; dw->dma.device_free_chan_resources = dwc_free_chan_resources; |