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authorDave Jiang <dave.jiang@intel.com>2020-10-28 00:34:09 +0300
committerVinod Koul <vkoul@kernel.org>2020-10-28 08:32:41 +0300
commit484f910e93b48c1d8890d8330a87e34ae61f4782 (patch)
treeeb6dbed5e736cacda803600d6e2a519e517615b9 /drivers/dma/ti
parent3650b228f83adda7e5ee532e2b90429c03f7b9ec (diff)
downloadlinux-484f910e93b48c1d8890d8330a87e34ae61f4782.tar.xz
dmaengine: idxd: fix wq config registers offset programming
DSA spec v1.1 [1] updated to include a stride size register for WQ configuration that will specify how much space is reserved for the WQ configuration register set. This change is expected to be in the final gen1 DSA hardware. Fix the driver to use WQCFG_OFFSET() for all WQ offset calculation and fixup WQCFG_OFFSET() to use the new calculated wq size. [1]: https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html Fixes: bfe1d56091c1 ("dmaengine: idxd: Init and probe for Intel data accelerators") Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/160383444959.48058.14249265538404901781.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/ti')
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