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authorThomas Gleixner <tglx@linutronix.de>2014-04-28 23:29:57 +0400
committerVinod Koul <vinod.koul@intel.com>2014-04-30 09:04:07 +0400
commitc2da2340e5818aa72b2e847f1f24b036742ea5c7 (patch)
treef9fb339720f05aaeab9c7ed16ead683d1b05736f /drivers/dma/edma.c
parentb5088ad9630c0aa477a4ed57747b8b3fa8e4b86b (diff)
downloadlinux-c2da2340e5818aa72b2e847f1f24b036742ea5c7.tar.xz
dmaengine: edma: Store transfer data in edma_desc and edma_pset
For granular accounting we need to store the direction and the information for the individual psets: - source or destination address, depending on direction - length Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/edma.c')
-rw-r--r--drivers/dma/edma.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index c6f60e9af8af..6e230006eb08 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -58,12 +58,15 @@
#define EDMA_DESCRIPTORS 16
struct edma_pset {
+ u32 len;
+ dma_addr_t addr;
struct edmacc_param param;
};
struct edma_desc {
struct virt_dma_desc vdesc;
struct list_head node;
+ enum dma_transfer_direction direction;
int cyclic;
int absync;
int pset_nr;
@@ -376,16 +379,20 @@ static int edma_config_pset(struct dma_chan *chan, struct edma_pset *epset,
cidx = acnt * bcnt;
}
+ epset->len = dma_length;
+
if (direction == DMA_MEM_TO_DEV) {
src_bidx = acnt;
src_cidx = cidx;
dst_bidx = 0;
dst_cidx = 0;
+ epset->addr = src_addr;
} else if (direction == DMA_DEV_TO_MEM) {
src_bidx = 0;
src_cidx = 0;
dst_bidx = acnt;
dst_cidx = cidx;
+ epset->addr = dst_addr;
} else if (direction == DMA_MEM_TO_MEM) {
src_bidx = acnt;
src_cidx = cidx;
@@ -463,6 +470,7 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
edesc->pset_nr = sg_len;
edesc->residue = 0;
+ edesc->direction = direction;
/* Allocate a PaRAM slot, if needed */
nslots = min_t(unsigned, MAX_NR_SG, sg_len);
@@ -615,6 +623,7 @@ static struct dma_async_tx_descriptor *edma_prep_dma_cyclic(
edesc->cyclic = 1;
edesc->pset_nr = nslots;
edesc->residue = buf_len;
+ edesc->direction = direction;
dev_dbg(dev, "%s: channel=%d nslots=%d period_len=%zu buf_len=%zu\n",
__func__, echan->ch_num, nslots, period_len, buf_len);