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authorDan Williams <dan.j.williams@intel.com>2022-03-15 04:22:44 +0300
committerDan Williams <dan.j.williams@intel.com>2022-04-13 05:11:58 +0300
commit31e624a77e748e4ab7d5c9c3ddc46ba7735bd75e (patch)
tree1f97c97b2b7e9707dc3afdbdb780a0e5a10e0a8c /drivers/cxl
parent36bfc6ad508af38f212cf5a38147d867fb3f80a8 (diff)
downloadlinux-31e624a77e748e4ab7d5c9c3ddc46ba7735bd75e.tar.xz
cxl/mem: Rename cxl_dvsec_decode_init() to cxl_hdm_decode_init()
cxl_dvsec_decode_init() is tasked with checking whether legacy DVSEC range based decode is in effect, or whether HDM can be enabled / already is enabled. As such it either succeeds or fails and that result is the return value. The @do_hdm_init variable is misleading in the case where HDM operation is already found to be active, so just call it @retval. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Davidlohr Bueso <dave@stgolabs.net> Link: https://lore.kernel.org/r/164730736435.3806189.2537160791687837469.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl')
-rw-r--r--drivers/cxl/mem.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
index 50704deb2ff0..3baae1332760 100644
--- a/drivers/cxl/mem.c
+++ b/drivers/cxl/mem.c
@@ -68,7 +68,7 @@ static int create_endpoint(struct cxl_memdev *cxlmd,
}
/**
- * cxl_dvsec_decode_init() - Setup HDM decoding for the endpoint
+ * cxl_hdm_decode_init() - Setup HDM decoding for the endpoint
* @cxlds: Device state
*
* Additionally, enables global HDM decoding. Warning: don't call this outside
@@ -79,12 +79,12 @@ static int create_endpoint(struct cxl_memdev *cxlmd,
* decoders, or if it can not be determined if DVSEC Ranges are in use.
* Otherwise, returns true.
*/
-__mock bool cxl_dvsec_decode_init(struct cxl_dev_state *cxlds)
+__mock bool cxl_hdm_decode_init(struct cxl_dev_state *cxlds)
{
struct cxl_endpoint_dvsec_info *info = &cxlds->info;
struct cxl_register_map map;
struct cxl_component_reg_map *cmap = &map.component_map;
- bool global_enable, do_hdm_init = false;
+ bool global_enable, retval = false;
void __iomem *crb;
u32 global_ctrl;
@@ -113,7 +113,7 @@ __mock bool cxl_dvsec_decode_init(struct cxl_dev_state *cxlds)
goto out;
}
- do_hdm_init = true;
+ retval = true;
/*
* Permanently (for this boot at least) opt the device into HDM
@@ -129,7 +129,7 @@ __mock bool cxl_dvsec_decode_init(struct cxl_dev_state *cxlds)
out:
iounmap(crb);
- return do_hdm_init;
+ return retval;
}
static int cxl_mem_probe(struct device *dev)
@@ -160,7 +160,7 @@ static int cxl_mem_probe(struct device *dev)
* If DVSEC ranges are being used instead of HDM decoder registers there
* is no use in trying to manage those.
*/
- if (!cxl_dvsec_decode_init(cxlds)) {
+ if (!cxl_hdm_decode_init(cxlds)) {
dev_err(dev,
"Legacy range registers configuration prevents HDM operation.\n");
return -EBUSY;