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authorKai Ye <yekai13@huawei.com>2021-06-26 05:50:33 +0300
committerHerbert Xu <herbert@gondor.apana.org.au>2021-06-28 06:28:09 +0300
commit66192b2e3fd8ab97ed518d6c0240e26655a20b4b (patch)
tree1d4e9380442a2898ee92c81ce7adb6d4b2a3b1d8 /drivers/crypto
parente29dd5c8382e39210a180b75b68912f536893ef0 (diff)
downloadlinux-66192b2e3fd8ab97ed518d6c0240e26655a20b4b.tar.xz
crypto: hisilicon/sec - fix the process of disabling sva prefetching
The open interface of the sva prefetching function is distinguish the chip version. But the close interface of the sva prefetching function doesn't distinguish the chip version. As a result, the sva prefetching close operation is also performed on Kunpeng920, those registers are important on Kunpeng920, which eventually leads to abnormal hardware problems. So need to fix it immediately. Signed-off-by: Kai Ye <yekai13@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/hisilicon/sec2/sec_main.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index d120ce3e34ed..490db7bccf61 100644
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c
@@ -364,6 +364,9 @@ static void sec_close_sva_prefetch(struct hisi_qm *qm)
u32 val;
int ret;
+ if (qm->ver < QM_HW_V3)
+ return;
+
val = readl_relaxed(qm->io_base + SEC_PREFETCH_CFG);
val |= SEC_PREFETCH_DISABLE;
writel(val, qm->io_base + SEC_PREFETCH_CFG);