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authorWeili Qian <qianweili@huawei.com>2022-09-09 12:46:56 +0300
committerHerbert Xu <herbert@gondor.apana.org.au>2022-09-16 13:29:44 +0300
commit129a9f340172b4f3857260a7a7bb9d7b3496ba50 (patch)
tree2a43e8d964a32e93c3210dc1e4d53cdd2998b8c3 /drivers/crypto/hisilicon/zip/zip_main.c
parent82f00b24f532557fb0e15a6a2747859e4b70c4bd (diff)
downloadlinux-129a9f340172b4f3857260a7a7bb9d7b3496ba50.tar.xz
crypto: hisilicon/qm - get qp num and depth from hardware registers
Hardware V3 and later versions can obtain qp num and depth supported by the hardware from registers. To be compatible with later hardware versions, get qp num and depth from registers instead of fixed marcos. Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/hisilicon/zip/zip_main.c')
-rw-r--r--drivers/crypto/hisilicon/zip/zip_main.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c
index 36809bae6334..24d5226e0a0a 100644
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c
@@ -82,7 +82,6 @@
#define HZIP_CORE_NUM (HZIP_COMP_CORE_NUM + \
HZIP_DECOMP_CORE_NUM)
#define HZIP_SQE_SIZE 128
-#define HZIP_SQ_SIZE (HZIP_SQE_SIZE * QM_Q_DEPTH)
#define HZIP_PF_DEF_Q_NUM 64
#define HZIP_PF_DEF_Q_BASE 0