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author | Boris BREZILLON <boris.brezillon@free-electrons.com> | 2014-09-02 11:50:15 +0400 |
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committer | Mike Turquette <mturquette@linaro.org> | 2014-09-03 02:37:11 +0400 |
commit | 3ef9dd2bab7d6a013f75f9fb226d0191e9981288 (patch) | |
tree | 057ff3bdfe0a9df7b759991f529d0cc75da8b82a /drivers/cpuidle | |
parent | 078a3eb519dacf28cb7c9bb2ad2f62e19ca6dcc2 (diff) | |
download | linux-3ef9dd2bab7d6a013f75f9fb226d0191e9981288.tar.xz |
clk: at91: rework PLL rate calculation
The AT91 PLL rate configuration is done by configuring a multiplier/divider
pair.
The previous calculation was over-complicated (and apparently buggy).
Simplify the implementation and add some comments to explain what is done
here.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Reported-by: Gaël PORTAY <gael.portay@gmail.com>
Tested-by: Gaël PORTAY <gael.portay@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/cpuidle')
0 files changed, 0 insertions, 0 deletions