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author | Wyes Karny <wyes.karny@amd.com> | 2023-02-14 10:58:11 +0300 |
---|---|---|
committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2023-02-15 17:58:07 +0300 |
commit | 6e9d12125fcac048c78f497044370c1da85b552a (patch) | |
tree | 3c61b07dcb2c764bed609f3189d1679009278845 /drivers/cpufreq | |
parent | f0f8e9e730b84dd9255343dc6b2cbd6ecc3a08e0 (diff) | |
download | linux-6e9d12125fcac048c78f497044370c1da85b552a.tar.xz |
cpufreq: amd-pstate: Fix invalid write to MSR_AMD_CPPC_REQ
`amd_pstate_set_epp` function uses `cppc_req_cached` and `epp` variable
to update the MSR_AMD_CPPC_REQ register for AMD MSR systems. The recent
commit 7cca9a9851a5 ("cpufreq: amd-pstate: avoid uninitialized variable
use") changed the sequence of updating cppc_req_cached and writing the
MSR_AMD_CPPC_REQ. Therefore while switching from powersave to
performance governor and vice-versa in active mode MSR_AMD_CPPC_REQ is
set with the previous cached value. To fix this: first update the
`cppc_req_cached` variable and then call `amd_pstate_set_epp` function.
- Before commit 7cca9a9851a5 ("cpufreq: amd-pstate: avoid uninitialized
variable use"):
With powersave governor:
[ 1.652743] amd_pstate_epp_init: writing to cppc_req_cached = 0x1eff
[ 1.652744] amd_pstate_set_epp: writing cppc_req_cached = 0x1eff
[ 1.652746] amd_pstate_set_epp: writing min_perf = 30, des_perf = 0, max_perf = 255, epp = 0
Changing to performance governor:
[ 300.493842] amd_pstate_epp_init: writing to cppc_req_cached = 0xffff
[ 300.493846] amd_pstate_set_epp: writing cppc_req_cached = 0xffff
[ 300.493847] amd_pstate_set_epp: writing min_perf = 255, des_perf = 0, max_perf = 255, epp = 0
- After commit 7cca9a9851a5 ("cpufreq: amd-pstate: avoid uninitialized
variable use"):
With powersave governor:
[ 1.646037] amd_pstate_set_epp: writing cppc_req_cached = 0xffff
[ 1.646038] amd_pstate_set_epp: writing min_perf = 255, des_perf = 0, max_perf = 255, epp = 0
[ 1.646042] amd_pstate_epp_init: writing to cppc_req_cached = 0x1eff
Changing to performance governor:
[ 687.117401] amd_pstate_set_epp: writing cppc_req_cached = 0x1eff
[ 687.117405] amd_pstate_set_epp: writing min_perf = 30, des_perf = 0, max_perf = 255, epp = 0
[ 687.117419] amd_pstate_epp_init: writing to cppc_req_cached = 0xffff
- After this fix:
With powersave governor:
[ 2.525717] amd_pstate_epp_init: writing to cppc_req_cached = 0x1eff
[ 2.525720] amd_pstate_set_epp: writing cppc_req_cached = 0x1eff
[ 2.525722] amd_pstate_set_epp: writing min_perf = 30, des_perf = 0, max_perf = 255, epp = 0
Changing to performance governor:
[ 3440.152468] amd_pstate_epp_init: writing to cppc_req_cached = 0xffff
[ 3440.152473] amd_pstate_set_epp: writing cppc_req_cached = 0xffff
[ 3440.152474] amd_pstate_set_epp: writing min_perf = 255, des_perf = 0, max_perf = 255, epp = 0
Fixes: 7cca9a9851a5 ("cpufreq: amd-pstate: avoid uninitialized variable use")
Signed-off-by: Wyes Karny <wyes.karny@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/cpufreq')
-rw-r--r-- | drivers/cpufreq/amd-pstate.c | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index b8862afef4e4..45c88894fd8e 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1057,27 +1057,28 @@ static void amd_pstate_epp_init(unsigned int cpu) cpudata->epp_policy = cpudata->policy; - if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) { - epp = amd_pstate_get_epp(cpudata, value); - if (epp < 0) - goto skip_epp; - /* force the epp value to be zero for performance policy */ - epp = 0; - } else { - /* Get BIOS pre-defined epp value */ - epp = amd_pstate_get_epp(cpudata, value); - if (epp) - goto skip_epp; + /* Get BIOS pre-defined epp value */ + epp = amd_pstate_get_epp(cpudata, value); + if (epp < 0) { + /** + * This return value can only be negative for shared_memory + * systems where EPP register read/write not supported. + */ + goto skip_epp; } + + if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) + epp = 0; + /* Set initial EPP value */ if (boot_cpu_has(X86_FEATURE_CPPC)) { value &= ~GENMASK_ULL(31, 24); value |= (u64)epp << 24; } + WRITE_ONCE(cpudata->cppc_req_cached, value); amd_pstate_set_epp(cpudata, epp); skip_epp: - WRITE_ONCE(cpudata->cppc_req_cached, value); cpufreq_cpu_put(policy); } |