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| author | lionel.debieve@st.com <lionel.debieve@st.com> | 2018-02-15 16:03:08 +0300 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2018-03-02 19:03:08 +0300 |
| commit | 326ed382256475aa4b8b7eae8a2f60689fd25e78 (patch) | |
| tree | ca40e54fdbf09b8b0fcffd96f73de2b9cd332470 /drivers/clocksource/timer-probe.c | |
| parent | 017457061e07852b7173e6a2578c129b49033204 (diff) | |
| download | linux-326ed382256475aa4b8b7eae8a2f60689fd25e78.tar.xz | |
hwrng: stm32 - add reset during probe
Avoid issue when probing the RNG without
reset if bad status has been detected previously
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/clocksource/timer-probe.c')
0 files changed, 0 insertions, 0 deletions