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author | jean-michel.hautbois@vodalys.com <jean-michel.hautbois@vodalys.com> | 2015-02-04 17:16:00 +0300 |
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committer | Mauro Carvalho Chehab <mchehab@osg.samsung.com> | 2015-03-02 20:56:21 +0300 |
commit | 80f4944ec2aecb64c213944f78745787e363672a (patch) | |
tree | 7165b585e820353c1a65281064f4325ce875cbfa /drivers/clocksource/tegra20_timer.c | |
parent | 61765a50323977a5fde86f736f0e55a5e680fbcf (diff) | |
download | linux-80f4944ec2aecb64c213944f78745787e363672a.tar.xz |
[media] media: adv7604: CP CSC uses a different register on adv7604 and adv7611
The bits are the same, but register is 0xf4 on ADV7611 instead of 0xfc.
When reading back the value in log_status, differentiate both.
Signed-off-by: Jean-Michel Hautbois <jean-michel.hautbois@vodalys.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Diffstat (limited to 'drivers/clocksource/tegra20_timer.c')
0 files changed, 0 insertions, 0 deletions