diff options
| author | Xiubo Li <Li.Xiubo@freescale.com> | 2014-04-23 06:12:00 +0400 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2014-05-23 11:19:40 +0400 |
| commit | 95c19a06ec1cf9530ebb8f2c7eeda1d7398b43f1 (patch) | |
| tree | 20561a7ed203836147c9f9070f2dd550e42eb626 /drivers/clocksource/mmio.c | |
| parent | 4a3ae07413844733e4cb3765f67a752b846df913 (diff) | |
| download | linux-95c19a06ec1cf9530ebb8f2c7eeda1d7398b43f1.tar.xz | |
clocksource: Fix clocksource_mmio_readX_down
For some clocksource devices, for example, the registers are 32-bit, while
the lower 16-bit is used for timer counting(And reading the upper 16-bit
will return 0).
For example, when the counter value is 0x00001111, and then the
~readl_relaxed(to_mmio_clksrc(c)->reg) will return the value of 0xFFFFEEEE,
but it should be 0x0000EEEE.
So just using the c->mask to mask the unused bits.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource/mmio.c')
| -rw-r--r-- | drivers/clocksource/mmio.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clocksource/mmio.c b/drivers/clocksource/mmio.c index 19a6b3f4d9cf..1593ade2a815 100644 --- a/drivers/clocksource/mmio.c +++ b/drivers/clocksource/mmio.c @@ -27,7 +27,7 @@ cycle_t clocksource_mmio_readl_up(struct clocksource *c) cycle_t clocksource_mmio_readl_down(struct clocksource *c) { - return ~(cycle_t)readl_relaxed(to_mmio_clksrc(c)->reg); + return ~(cycle_t)readl_relaxed(to_mmio_clksrc(c)->reg) & c->mask; } cycle_t clocksource_mmio_readw_up(struct clocksource *c) @@ -37,7 +37,7 @@ cycle_t clocksource_mmio_readw_up(struct clocksource *c) cycle_t clocksource_mmio_readw_down(struct clocksource *c) { - return ~(cycle_t)readw_relaxed(to_mmio_clksrc(c)->reg); + return ~(cycle_t)readw_relaxed(to_mmio_clksrc(c)->reg) & c->mask; } /** |