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authorStephen Boyd <sboyd@kernel.org>2024-05-17 04:09:14 +0300
committerStephen Boyd <sboyd@kernel.org>2024-05-17 04:09:14 +0300
commit03be434863b9606435be9ef43651d4c0cbbe6788 (patch)
tree59400166e61da2f4fcf51a18c4e0b16a0270d33b /drivers/clk
parent4a35e6fc41179ebcb8552c7f4421bfba57de768c (diff)
parentbc2da26599ed800357f24fca4b7f6a8f35d87dcb (diff)
parent0dc83ad8bfc9b5d40c1207674cecf77b85f54646 (diff)
parente2211387ed8ef30a6588aefa90213a63ff9d0a78 (diff)
downloadlinux-03be434863b9606435be9ef43651d4c0cbbe6788.tar.xz
Merge branches 'clk-microchip', 'clk-samsung' and 'clk-qcom' into clk-next
* clk-microchip: clk, reset: microchip: mpfs: fix incorrect preprocessor conditions clock, reset: microchip: move all mpfs reset code to the reset subsystem * clk-samsung: clk: samsung: Don't register clkdev lookup for the fixed rate clocks clk: samsung: gs101: drop unused HSI2 clock parent data clk: samsung: gs101: mark some apm UASC and XIU clocks critical clk: samsung: gs101: add support for cmu_hsi2 clk: samsung: gs101: add support for cmu_hsi0 dt-bindings: clock: google,gs101-clock: add HSI2 clock management unit dt-bindings: clock: google,gs101-clock: add HSI0 clock management unit clk: samsung: gs101: propagate PERIC1 USI SPI clock rate clk: samsung: gs101: propagate PERIC0 USI SPI clock rate clk: samsung: exynosautov9: fix wrong pll clock id value dt-bindings: clock: samsung,s3c6400-clock: convert to DT Schema clk: samsung: exynos850: Add CMU_CPUCL0 and CMU_CPUCL1 clk: samsung: Implement manual PLL control for ARM64 SoCs * clk-qcom: (27 commits) clk: qcom: clk-alpha-pll: fix rate setting for Stromer PLLs clk: qcom: apss-ipq-pll: fix PLL rate for IPQ5018 clk: qcom: Fix SM_GPUCC_8650 dependencies clk: qcom: Fix SC_CAMCC_8280XP dependencies clk: qcom: mmcc-msm8998: fix venus clock issue clk: qcom: dispcc-sm8650: fix DisplayPort clocks clk: qcom: dispcc-sm8550: fix DisplayPort clocks clk: qcom: dispcc-sm6350: fix DisplayPort clocks clk: qcom: dispcc-sm8450: fix DisplayPort clocks clk: qcom: clk-cbf-8996: use HUAYRA_APSS register map for cbf_pll clk: qcom: apss-ipq-pll: constify clk_init_data structures clk: qcom: apss-ipq-pll: constify match data structures clk: qcom: apss-ipq-pll: move Huayra register map to 'clk_alpha_pll_regs' clk: qcom: apss-ipq-pll: reuse Stromer reg offsets from 'clk_alpha_pll_regs' clk: qcom: apss-ipq-pll: use stromer ops for IPQ5018 to fix boot failure clk: qcom: gcc-ipq8074: rework nss_port5/6 clock to multiple conf clk: qcom: clk-rcg2: add support for rcg2 freq multi ops clk: qcom: clk-rcg: introduce support for multiple conf for same freq clk: qcom: hfpll: Add QCS404-specific compatible dt-bindings: clock: qcom,hfpll: Convert to YAML ...