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author | Stephen Boyd <sboyd@kernel.org> | 2021-09-02 01:27:07 +0300 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2021-09-02 01:27:07 +0300 |
commit | 47505bf3a82166c3576155c229e941af922bf147 (patch) | |
tree | 5bb15a1244846cd4821347a6c82d048df4b21a2b /drivers/clk/zynqmp | |
parent | 8fb59ce15c43d025dadc2df3d21590bd1e91eff0 (diff) | |
parent | aaedb9e00e5400220a8871180d23a83e67f29f63 (diff) | |
parent | 3e061910b2a2ea2bc25861068a11df011fd3a0f8 (diff) | |
parent | 46d4ee48aaef1671adfddbbde588af2259573ba7 (diff) | |
parent | e7296d16ef7be11a6001be9bd89906ef55ab2405 (diff) | |
parent | c16edf5ff8ece9c4135175da4103cee1bec360be (diff) | |
download | linux-47505bf3a82166c3576155c229e941af922bf147.tar.xz |
Merge branches 'clk-kirkwood', 'clk-imx', 'clk-doc', 'clk-zynq' and 'clk-ralink' into clk-next
* clk-kirkwood:
clk: kirkwood: Fix a clocking boot regression
* clk-imx:
clk: imx8mn: Add M7 core clock
clk: imx8m: fix clock tree update of TF-A managed clocks
clk: imx: clk-divider-gate: Switch to clk_divider.determine_rate
clk: imx8mn: use correct mux type for clkout path
clk: imx8mm: use correct mux type for clkout path
* clk-doc:
dt-bindings: clock: samsung: fix header path in example
MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry
dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
dt-bindings: clock: samsung: convert Exynos4 to dtschema
dt-bindings: clock: samsung: convert Exynos3250 to dtschema
dt-bindings: clock: samsung: convert Exynos542x to dtschema
dt-bindings: clock: samsung: add bindings for Exynos external clock
dt-bindings: clock: samsung: convert Exynos5250 to dtschema
dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
clk: zynqmp: Fix kernel-doc format
clk: at91: sama7g5: remove all kernel-doc & kernel-doc warnings
clk: zynqmp: fix kernel doc
* clk-zynq:
clk: zynqmp: Fix a memory leak
clk: zynqmp: Check the return type
* clk-ralink:
clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates