diff options
| author | Joseph Lo <josephl@nvidia.com> | 2019-01-04 06:06:48 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2019-02-06 16:28:41 +0300 |
| commit | b3cf8d0695056a370276c416979277635c3e4299 (patch) | |
| tree | 270ce13bc347fe5df0ca6d8d39f01e38b6f88213 /drivers/clk/tegra/cvb.h | |
| parent | b0dcfb78dc6aec8698ab5900dfdf6aeae0830815 (diff) | |
| download | linux-b3cf8d0695056a370276c416979277635c3e4299.tar.xz | |
clk: tegra: dfll: CVB calculation alignment with the regulator
The CVB table contains calibration data for the CPU DFLL based on
process characterization. The regulator step and offset parameters depend
on the regulator supplying vdd-cpu, not on the specific Tegra SKU.
When using a PWM controlled regulator, the voltage step and offset are
determined by the regulator type in use. This is specified in DT. When
using an I2C controlled regulator, we can retrieve them from CPU regulator
Then pass this information to the CVB table calculation function.
Based on the work done of "Peter De Schrijver <pdeschrijver@nvidia.com>"
and "Alex Frid <afrid@nvidia.com>".
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/cvb.h')
| -rw-r--r-- | drivers/clk/tegra/cvb.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/tegra/cvb.h b/drivers/clk/tegra/cvb.h index c1f077993b2a..bcf15a089b93 100644 --- a/drivers/clk/tegra/cvb.h +++ b/drivers/clk/tegra/cvb.h @@ -49,7 +49,6 @@ struct cvb_table { int min_millivolts; int max_millivolts; - struct rail_alignment alignment; int speedo_scale; int voltage_scale; @@ -59,8 +58,9 @@ struct cvb_table { const struct cvb_table * tegra_cvb_add_opp_table(struct device *dev, const struct cvb_table *cvb_tables, - size_t count, int process_id, int speedo_id, - int speedo_value, unsigned long max_freq); + size_t count, struct rail_alignment *align, + int process_id, int speedo_id, int speedo_value, + unsigned long max_freq); void tegra_cvb_remove_opp_table(struct device *dev, const struct cvb_table *table, unsigned long max_freq); |