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authorPeter De Schrijver <pdeschrijver@nvidia.com>2017-02-28 17:37:17 +0300
committerThierry Reding <treding@nvidia.com>2017-03-20 16:06:23 +0300
commitbfa34832df1fffb79c1719d4016e9cacf0f83b22 (patch)
tree167619686170ed36db83cdfad93ce3b815753877 /drivers/clk/tegra/clk-tegra-periph.c
parente589376dab0753bc24c20867cd4f65290ff76381 (diff)
downloadlinux-bfa34832df1fffb79c1719d4016e9cacf0f83b22.tar.xz
clk: tegra: Add CEC clock
This clock is used to clock the HDMI CEC interface. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra-periph.c')
-rw-r--r--drivers/clk/tegra/clk-tegra-periph.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
index c9e795b190f2..a2aed27b3265 100644
--- a/drivers/clk/tegra/clk-tegra-periph.c
+++ b/drivers/clk/tegra/clk-tegra-periph.c
@@ -837,6 +837,7 @@ static struct tegra_periph_init_data gate_clks[] = {
GATE("pll_p_out_cpu", "pll_p", 223, 0, tegra_clk_pll_p_out_cpu, 0),
GATE("pll_p_out_adsp", "pll_p", 187, 0, tegra_clk_pll_p_out_adsp, 0),
GATE("apb2ape", "clk_m", 107, 0, tegra_clk_apb2ape, 0),
+ GATE("cec", "pclk", 136, 0, tegra_clk_cec, 0),
};
static struct tegra_periph_init_data div_clks[] = {