diff options
| author | Icenowy Zheng <icenowy@aosc.io> | 2019-07-13 06:46:28 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-07-22 09:33:20 +0300 |
| commit | c5ed9475c22c89d5409402055142372e35d26a3f (patch) | |
| tree | efaf374835ea7534a86b1996de7ec7a11cfd3b85 /drivers/clk/sunxi-ng/ccu-sun8i-v3s.h | |
| parent | 5f9e832c137075045d15cd6899ab0505cfb2ca4b (diff) | |
| download | linux-c5ed9475c22c89d5409402055142372e35d26a3f.tar.xz | |
clk: sunxi-ng: v3s: add the missing PLL_DDR1
The user manual of V3/V3s/S3 declares a PLL_DDR1, however it's forgot
when developing the V3s CCU driver.
Add back the missing PLL_DDR1.
Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu-sun8i-v3s.h')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun8i-v3s.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h index fbc1da8b4520..10af324bd6b1 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h @@ -20,7 +20,7 @@ #define CLK_PLL_AUDIO_8X 5 #define CLK_PLL_VIDEO 6 #define CLK_PLL_VE 7 -#define CLK_PLL_DDR 8 +#define CLK_PLL_DDR0 8 #define CLK_PLL_PERIPH0 9 #define CLK_PLL_PERIPH0_2X 10 #define CLK_PLL_ISP 11 @@ -49,6 +49,8 @@ /* And the GPU module clock is exported */ -#define CLK_NUMBER (CLK_MIPI_CSI + 1) +#define CLK_PLL_DDR1 74 + +#define CLK_NUMBER (CLK_PLL_DDR1 + 1) #endif /* _CCU_SUN8I_H3_H_ */ |