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authorStephen Boyd <sboyd@codeaurora.org>2017-04-19 19:02:00 +0300
committerStephen Boyd <sboyd@codeaurora.org>2017-04-19 19:02:00 +0300
commit8062b4aafc67376fb55c0438f26410d0563459ec (patch)
treebceac42287e7cd3c26bef2e16abfc184d5ac45a2 /drivers/clk/sunxi-ng/Kconfig
parente609f9f23e57f6af1c8f0b5759a87f9db3521eb1 (diff)
parentcb545960dea2749771c88b0cb26e5adfd12a0315 (diff)
downloadlinux-8062b4aafc67376fb55c0438f26410d0563459ec.tar.xz
Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next
Pull Allwinner clock patches for 4.12 from Maxime Ripard: Support for the new H5 SoC and the PRCM block found in a number of SoCs as well, plus the usual chunk of fixes and minor enhancements. * tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: Display index when clock registration fails clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factor clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type multiplier clocks clk: sunxi-ng: mult: Support PLL lock detection clk: sunxi-ng: add support for PRCM CCUs dt-bindings: update device tree binding for Allwinner PRCM CCUs clk: sunxi-ng: sun5i: Fix mux width for csi clock clk: sunxi-ng: tighten SoC deps on explicit AllWinner SoCs clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver clk: sunxi-ng: gate: Support common pre-dividers
Diffstat (limited to 'drivers/clk/sunxi-ng/Kconfig')
-rw-r--r--drivers/clk/sunxi-ng/Kconfig16
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
index 1c2357301017..64088e599404 100644
--- a/drivers/clk/sunxi-ng/Kconfig
+++ b/drivers/clk/sunxi-ng/Kconfig
@@ -64,6 +64,7 @@ config SUN50I_A64_CCU
select SUNXI_CCU_MP
select SUNXI_CCU_PHASE
default ARM64 && ARCH_SUNXI
+ depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
config SUN5I_CCU
bool "Support for the Allwinner sun5i family CCM"
@@ -75,6 +76,7 @@ config SUN5I_CCU
select SUNXI_CCU_MP
select SUNXI_CCU_PHASE
default MACH_SUN5I
+ depends on MACH_SUN5I || COMPILE_TEST
config SUN6I_A31_CCU
bool "Support for the Allwinner A31/A31s CCU"
@@ -86,6 +88,7 @@ config SUN6I_A31_CCU
select SUNXI_CCU_MP
select SUNXI_CCU_PHASE
default MACH_SUN6I
+ depends on MACH_SUN6I || COMPILE_TEST
config SUN8I_A23_CCU
bool "Support for the Allwinner A23 CCU"
@@ -98,6 +101,7 @@ config SUN8I_A23_CCU
select SUNXI_CCU_MP
select SUNXI_CCU_PHASE
default MACH_SUN8I
+ depends on MACH_SUN8I || COMPILE_TEST
config SUN8I_A33_CCU
bool "Support for the Allwinner A33 CCU"
@@ -110,6 +114,7 @@ config SUN8I_A33_CCU
select SUNXI_CCU_MP
select SUNXI_CCU_PHASE
default MACH_SUN8I
+ depends on MACH_SUN8I || COMPILE_TEST
config SUN8I_H3_CCU
bool "Support for the Allwinner H3 CCU"
@@ -120,7 +125,8 @@ config SUN8I_H3_CCU
select SUNXI_CCU_NM
select SUNXI_CCU_MP
select SUNXI_CCU_PHASE
- default MACH_SUN8I
+ default MACH_SUN8I || (ARM64 && ARCH_SUNXI)
+ depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
config SUN8I_V3S_CCU
bool "Support for the Allwinner V3s CCU"
@@ -132,6 +138,7 @@ config SUN8I_V3S_CCU
select SUNXI_CCU_MP
select SUNXI_CCU_PHASE
default MACH_SUN8I
+ depends on MACH_SUN8I || COMPILE_TEST
config SUN9I_A80_CCU
bool "Support for the Allwinner A80 CCU"
@@ -143,5 +150,12 @@ config SUN9I_A80_CCU
select SUNXI_CCU_MP
select SUNXI_CCU_PHASE
default MACH_SUN9I
+ depends on MACH_SUN9I || COMPILE_TEST
+
+config SUN8I_R_CCU
+ bool "Support for Allwinner SoCs' PRCM CCUs"
+ select SUNXI_CCU_DIV
+ select SUNXI_CCU_GATE
+ default MACH_SUN8I || (ARCH_SUNXI && ARM64)
endif