diff options
| author | Dinh Nguyen <dinguyen@kernel.org> | 2020-05-12 21:16:43 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-05-27 05:13:05 +0300 |
| commit | 762d961aee4042282b83db557edff305eb8a1713 (patch) | |
| tree | 3ec896aefeee4c5b9349bc0ea76e92b945f2ed3b /drivers/clk/socfpga/clk-pll-s10.c | |
| parent | 8f3d9f354286745c751374f5f1fcafee6b3f3136 (diff) | |
| download | linux-762d961aee4042282b83db557edff305eb8a1713.tar.xz | |
clk: socfpga: stratix10: use new parent data scheme
Convert, where possible, the stratix10 clock driver to the new parent
data scheme by specifying the parent data for clocks that have multiple
parents.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lkml.kernel.org/r/20200512181647.5071-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/socfpga/clk-pll-s10.c')
| -rw-r--r-- | drivers/clk/socfpga/clk-pll-s10.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/socfpga/clk-pll-s10.c b/drivers/clk/socfpga/clk-pll-s10.c index a301bb22f36c..bcd3f14e9145 100644 --- a/drivers/clk/socfpga/clk-pll-s10.c +++ b/drivers/clk/socfpga/clk-pll-s10.c @@ -117,7 +117,6 @@ struct clk *s10_register_pll(const struct stratix10_pll_clock *clks, struct socfpga_pll *pll_clk; struct clk_init_data init; const char *name = clks->name; - const char * const *parent_names = clks->parent_names; pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); if (WARN_ON(!pll_clk)) @@ -134,7 +133,8 @@ struct clk *s10_register_pll(const struct stratix10_pll_clock *clks, init.flags = clks->flags; init.num_parents = clks->num_parents; - init.parent_names = parent_names; + init.parent_names = NULL; + init.parent_data = clks->parent_data; pll_clk->hw.hw.init = &init; pll_clk->hw.bit_idx = SOCFPGA_PLL_POWER; |