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authorTomasz Figa <t.figa@samsung.com>2013-08-26 21:09:05 +0400
committerMike Turquette <mturquette@linaro.org>2013-09-07 00:33:39 +0400
commitb4054ac6a26ee94a3a0f18e9ea585545d69e29c2 (patch)
tree890bf6d1777040b7457000c9f789e7298ffd7574 /drivers/clk/samsung/clk-pll.h
parent52b0601637ac41845d216c490a75e489a14c4e95 (diff)
downloadlinux-b4054ac6a26ee94a3a0f18e9ea585545d69e29c2.tar.xz
clk: samsung: pll: Add support for rate configuration of PLL45xx
This patch implements round_rate and set_rate callbacks of PLL45xx driver to allow reconfiguration of PLL at runtime. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/samsung/clk-pll.h')
-rw-r--r--drivers/clk/samsung/clk-pll.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h
index fceb2cb00f2a..2c331291fe40 100644
--- a/drivers/clk/samsung/clk-pll.h
+++ b/drivers/clk/samsung/clk-pll.h
@@ -41,6 +41,15 @@ enum samsung_pll_type {
.kdiv = (_k), \
}
+#define PLL_45XX_RATE(_rate, _m, _p, _s, _afc) \
+ { \
+ .rate = (_rate), \
+ .mdiv = (_m), \
+ .pdiv = (_p), \
+ .sdiv = (_s), \
+ .afc = (_afc), \
+ }
+
/* NOTE: Rate table should be kept sorted in descending order. */
struct samsung_pll_rate_table {
@@ -49,6 +58,7 @@ struct samsung_pll_rate_table {
unsigned int mdiv;
unsigned int sdiv;
unsigned int kdiv;
+ unsigned int afc;
};
enum pll46xx_type {