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authorGeert Uytterhoeven <geert+renesas@glider.be>2019-08-30 16:45:08 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2019-10-01 11:24:43 +0300
commit3e8c1d4cce6b679f4cfd81dfdbbf727f06986aa5 (patch)
treea60cba39dd1574590fe9c554e118811ed3b87048 /drivers/clk/renesas
parent58256143cff7c2e0a72fe609e797a36b26a3c381 (diff)
downloadlinux-3e8c1d4cce6b679f4cfd81dfdbbf727f06986aa5.tar.xz
clk: renesas: rcar-gen2: Improve arithmetic divisions
- Use div64_ul() instead of div_u64() if the divisor is unsigned long, to avoid truncation to 32-bit on 64-bit platforms, - Prefer ULL constant suffixes over casts to u64, - Prioritize multiplication over division, to increase accuracy. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20190830134515.11925-2-geert+renesas@glider.be
Diffstat (limited to 'drivers/clk/renesas')
-rw-r--r--drivers/clk/renesas/rcar-gen2-cpg.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/renesas/rcar-gen2-cpg.c b/drivers/clk/renesas/rcar-gen2-cpg.c
index f596a2dafcf4..c378505830f0 100644
--- a/drivers/clk/renesas/rcar-gen2-cpg.c
+++ b/drivers/clk/renesas/rcar-gen2-cpg.c
@@ -72,10 +72,10 @@ static long cpg_z_clk_round_rate(struct clk_hw *hw, unsigned long rate,
if (!prate)
prate = 1;
- mult = div_u64((u64)rate * 32, prate);
+ mult = div64_ul(rate * 32ULL, prate);
mult = clamp(mult, 1U, 32U);
- return *parent_rate / 32 * mult;
+ return div_u64((u64)*parent_rate * mult, 32);
}
static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -86,7 +86,7 @@ static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate,
u32 val, kick;
unsigned int i;
- mult = div_u64((u64)rate * 32, parent_rate);
+ mult = div64_ul(rate * 32ULL, parent_rate);
mult = clamp(mult, 1U, 32U);
if (readl(zclk->kick_reg) & CPG_FRQCRB_KICK)