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author | Marc Gonzalez <marc.w.gonzalez@free.fr> | 2019-03-25 16:49:54 +0300 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2019-04-11 23:37:42 +0300 |
commit | c0ee0e43c049a13d11e913edf875e4ee376dc84b (patch) | |
tree | 95ce1b4bb70925a9e36e6040bc6ca9b607b6d523 /drivers/clk/qcom | |
parent | 892df0191b29a2309d2dc9e30252b289630a8b4e (diff) | |
download | linux-c0ee0e43c049a13d11e913edf875e4ee376dc84b.tar.xz |
clk: qcom: Skip halt checks on gcc_pcie_0_pipe_clk for 8998
See similar issue solved by commit 5f2420ed2189
("clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998")
Without this patch, PCIe PHY init fails:
qcom-qmp-phy 1c06000.phy: pipe_clk enable failed err=-16
phy phy-1c06000.phy.0: phy init failed --> -16
Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
Fixes: b5f5f525c547 ("clk: qcom: Add MSM8998 Global Clock Control (GCC) driver")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom')
-rw-r--r-- | drivers/clk/qcom/gcc-msm8998.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index c240fba794c7..033688264c7b 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -2161,7 +2161,7 @@ static struct clk_branch gcc_pcie_0_mstr_axi_clk = { static struct clk_branch gcc_pcie_0_pipe_clk = { .halt_reg = 0x6b018, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x6b018, .enable_mask = BIT(0), |