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author | Thomas Gleixner <tglx@linutronix.de> | 2015-05-19 17:12:32 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2015-05-19 17:12:32 +0300 |
commit | c3b5d3cea508d2c8ff493ef18c45a9cc58fb7015 (patch) | |
tree | a80672ee82fcc3d9c8d486e53731eb19cd968eb0 /drivers/clk/qcom/mmcc-msm8974.c | |
parent | daa67b4b70568a07fef3cffacb2055891bf42ddb (diff) | |
parent | e26081808edadfd257c6c9d81014e3b25e9a6118 (diff) | |
download | linux-c3b5d3cea508d2c8ff493ef18c45a9cc58fb7015.tar.xz |
Merge branch 'linus' into timers/core
Make sure the upstream fixes are applied before adding further
modifications.
Diffstat (limited to 'drivers/clk/qcom/mmcc-msm8974.c')
-rw-r--r-- | drivers/clk/qcom/mmcc-msm8974.c | 134 |
1 files changed, 68 insertions, 66 deletions
diff --git a/drivers/clk/qcom/mmcc-msm8974.c b/drivers/clk/qcom/mmcc-msm8974.c index be94c54a9a4f..07f4cc159ad3 100644 --- a/drivers/clk/qcom/mmcc-msm8974.c +++ b/drivers/clk/qcom/mmcc-msm8974.c @@ -32,26 +32,28 @@ #include "clk-branch.h" #include "reset.h" -#define P_XO 0 -#define P_MMPLL0 1 -#define P_EDPLINK 1 -#define P_MMPLL1 2 -#define P_HDMIPLL 2 -#define P_GPLL0 3 -#define P_EDPVCO 3 -#define P_GPLL1 4 -#define P_DSI0PLL 4 -#define P_DSI0PLL_BYTE 4 -#define P_MMPLL2 4 -#define P_MMPLL3 4 -#define P_DSI1PLL 5 -#define P_DSI1PLL_BYTE 5 - -static const u8 mmcc_xo_mmpll0_mmpll1_gpll0_map[] = { - [P_XO] = 0, - [P_MMPLL0] = 1, - [P_MMPLL1] = 2, - [P_GPLL0] = 5, +enum { + P_XO, + P_MMPLL0, + P_EDPLINK, + P_MMPLL1, + P_HDMIPLL, + P_GPLL0, + P_EDPVCO, + P_GPLL1, + P_DSI0PLL, + P_DSI0PLL_BYTE, + P_MMPLL2, + P_MMPLL3, + P_DSI1PLL, + P_DSI1PLL_BYTE, +}; + +static const struct parent_map mmcc_xo_mmpll0_mmpll1_gpll0_map[] = { + { P_XO, 0 }, + { P_MMPLL0, 1 }, + { P_MMPLL1, 2 }, + { P_GPLL0, 5 } }; static const char *mmcc_xo_mmpll0_mmpll1_gpll0[] = { @@ -61,13 +63,13 @@ static const char *mmcc_xo_mmpll0_mmpll1_gpll0[] = { "mmss_gpll0_vote", }; -static const u8 mmcc_xo_mmpll0_dsi_hdmi_gpll0_map[] = { - [P_XO] = 0, - [P_MMPLL0] = 1, - [P_HDMIPLL] = 4, - [P_GPLL0] = 5, - [P_DSI0PLL] = 2, - [P_DSI1PLL] = 3, +static const struct parent_map mmcc_xo_mmpll0_dsi_hdmi_gpll0_map[] = { + { P_XO, 0 }, + { P_MMPLL0, 1 }, + { P_HDMIPLL, 4 }, + { P_GPLL0, 5 }, + { P_DSI0PLL, 2 }, + { P_DSI1PLL, 3 } }; static const char *mmcc_xo_mmpll0_dsi_hdmi_gpll0[] = { @@ -79,12 +81,12 @@ static const char *mmcc_xo_mmpll0_dsi_hdmi_gpll0[] = { "dsi1pll", }; -static const u8 mmcc_xo_mmpll0_1_2_gpll0_map[] = { - [P_XO] = 0, - [P_MMPLL0] = 1, - [P_MMPLL1] = 2, - [P_GPLL0] = 5, - [P_MMPLL2] = 3, +static const struct parent_map mmcc_xo_mmpll0_1_2_gpll0_map[] = { + { P_XO, 0 }, + { P_MMPLL0, 1 }, + { P_MMPLL1, 2 }, + { P_GPLL0, 5 }, + { P_MMPLL2, 3 } }; static const char *mmcc_xo_mmpll0_1_2_gpll0[] = { @@ -95,12 +97,12 @@ static const char *mmcc_xo_mmpll0_1_2_gpll0[] = { "mmpll2", }; -static const u8 mmcc_xo_mmpll0_1_3_gpll0_map[] = { - [P_XO] = 0, - [P_MMPLL0] = 1, - [P_MMPLL1] = 2, - [P_GPLL0] = 5, - [P_MMPLL3] = 3, +static const struct parent_map mmcc_xo_mmpll0_1_3_gpll0_map[] = { + { P_XO, 0 }, + { P_MMPLL0, 1 }, + { P_MMPLL1, 2 }, + { P_GPLL0, 5 }, + { P_MMPLL3, 3 } }; static const char *mmcc_xo_mmpll0_1_3_gpll0[] = { @@ -111,12 +113,12 @@ static const char *mmcc_xo_mmpll0_1_3_gpll0[] = { "mmpll3", }; -static const u8 mmcc_xo_mmpll0_1_gpll1_0_map[] = { - [P_XO] = 0, - [P_MMPLL0] = 1, - [P_MMPLL1] = 2, - [P_GPLL0] = 5, - [P_GPLL1] = 4, +static const struct parent_map mmcc_xo_mmpll0_1_gpll1_0_map[] = { + { P_XO, 0 }, + { P_MMPLL0, 1 }, + { P_MMPLL1, 2 }, + { P_GPLL0, 5 }, + { P_GPLL1, 4 } }; static const char *mmcc_xo_mmpll0_1_gpll1_0[] = { @@ -127,13 +129,13 @@ static const char *mmcc_xo_mmpll0_1_gpll1_0[] = { "gpll1_vote", }; -static const u8 mmcc_xo_dsi_hdmi_edp_map[] = { - [P_XO] = 0, - [P_EDPLINK] = 4, - [P_HDMIPLL] = 3, - [P_EDPVCO] = 5, - [P_DSI0PLL] = 1, - [P_DSI1PLL] = 2, +static const struct parent_map mmcc_xo_dsi_hdmi_edp_map[] = { + { P_XO, 0 }, + { P_EDPLINK, 4 }, + { P_HDMIPLL, 3 }, + { P_EDPVCO, 5 }, + { P_DSI0PLL, 1 }, + { P_DSI1PLL, 2 } }; static const char *mmcc_xo_dsi_hdmi_edp[] = { @@ -145,13 +147,13 @@ static const char *mmcc_xo_dsi_hdmi_edp[] = { "dsi1pll", }; -static const u8 mmcc_xo_dsi_hdmi_edp_gpll0_map[] = { - [P_XO] = 0, - [P_EDPLINK] = 4, - [P_HDMIPLL] = 3, - [P_GPLL0] = 5, - [P_DSI0PLL] = 1, - [P_DSI1PLL] = 2, +static const struct parent_map mmcc_xo_dsi_hdmi_edp_gpll0_map[] = { + { P_XO, 0 }, + { P_EDPLINK, 4 }, + { P_HDMIPLL, 3 }, + { P_GPLL0, 5 }, + { P_DSI0PLL, 1 }, + { P_DSI1PLL, 2 } }; static const char *mmcc_xo_dsi_hdmi_edp_gpll0[] = { @@ -163,13 +165,13 @@ static const char *mmcc_xo_dsi_hdmi_edp_gpll0[] = { "dsi1pll", }; -static const u8 mmcc_xo_dsibyte_hdmi_edp_gpll0_map[] = { - [P_XO] = 0, - [P_EDPLINK] = 4, - [P_HDMIPLL] = 3, - [P_GPLL0] = 5, - [P_DSI0PLL_BYTE] = 1, - [P_DSI1PLL_BYTE] = 2, +static const struct parent_map mmcc_xo_dsibyte_hdmi_edp_gpll0_map[] = { + { P_XO, 0 }, + { P_EDPLINK, 4 }, + { P_HDMIPLL, 3 }, + { P_GPLL0, 5 }, + { P_DSI0PLL_BYTE, 1 }, + { P_DSI1PLL_BYTE, 2 } }; static const char *mmcc_xo_dsibyte_hdmi_edp_gpll0[] = { |