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authorAbhishek Sahu <absahu@codeaurora.org>2017-12-13 17:25:33 +0300
committerStephen Boyd <sboyd@codeaurora.org>2017-12-22 03:03:22 +0300
commitdf964016490b2cf630b1b926a1d5c610833aaa84 (patch)
treed6d813cc879153ee02e15d478e28ecbfad0a5026 /drivers/clk/qcom/common.h
parentf933d383df6b42e3262426d35593f18ff21aad57 (diff)
downloadlinux-df964016490b2cf630b1b926a1d5c610833aaa84.tar.xz
clk: qcom: add parent map for regmap mux
Currently the driver assumes the register configuration value is identical to its index in the parent map. This patch adds the parent map field in regmap mux clock node which contains the mapping of parent index with actual register configuration value. If regmap node contains this parent map then the configuration value will be taken from this parent map instead of simply writing the index value. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom/common.h')
-rw-r--r--drivers/clk/qcom/common.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/clk/qcom/common.h b/drivers/clk/qcom/common.h
index 23c1927669ba..00196ee15e73 100644
--- a/drivers/clk/qcom/common.h
+++ b/drivers/clk/qcom/common.h
@@ -20,7 +20,6 @@ struct qcom_reset_map;
struct regmap;
struct freq_tbl;
struct clk_hw;
-struct parent_map;
#define PLL_LOCK_COUNT_SHIFT 8
#define PLL_LOCK_COUNT_MASK 0x3f
@@ -39,6 +38,16 @@ struct qcom_cc_desc {
size_t num_gdscs;
};
+/**
+ * struct parent_map - map table for source select configuration values
+ * @src: source
+ * @cfg: configuration value
+ */
+struct parent_map {
+ u8 src;
+ u8 cfg;
+};
+
extern const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f,
unsigned long rate);
extern const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,