diff options
| author | Dmitry Shmidt <dimitrysh@google.com> | 2020-06-10 11:30:12 +0300 |
|---|---|---|
| committer | Jerome Brunet <jbrunet@baylibre.com> | 2020-06-19 18:16:39 +0300 |
| commit | 2f1efa5340eff9af36c9a7347bb97abd726128a0 (patch) | |
| tree | 2d18fd003d9442809eb1c559cfa6ad0cda8df4e6 /drivers/clk/meson/g12a.h | |
| parent | df06230106e95347ec613f1707a704b04737c59b (diff) | |
| download | linux-2f1efa5340eff9af36c9a7347bb97abd726128a0.tar.xz | |
clk: meson: g12a: Add support for NNA CLK source clocks
This adds the Neural Network Accelerator source clocks hierarchy, it's
2 simple composite clocks to feed the AXI interface and the Core of
the Neural Network Accelerator IP.
This IP is only present on the Amlogic SM1 SoCs family.
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20200610083012.5024-3-narmstrong@baylibre.com
Diffstat (limited to 'drivers/clk/meson/g12a.h')
| -rw-r--r-- | drivers/clk/meson/g12a.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/clk/meson/g12a.h b/drivers/clk/meson/g12a.h index a8852556836e..69b6a69549c7 100644 --- a/drivers/clk/meson/g12a.h +++ b/drivers/clk/meson/g12a.h @@ -70,6 +70,7 @@ #define HHI_MALI_CLK_CNTL 0x1b0 #define HHI_VPU_CLKC_CNTL 0x1b4 #define HHI_VPU_CLK_CNTL 0x1bC +#define HHI_NNA_CLK_CNTL 0x1C8 #define HHI_HDMI_CLK_CNTL 0x1CC #define HHI_VDEC_CLK_CNTL 0x1E0 #define HHI_VDEC2_CLK_CNTL 0x1E4 @@ -259,8 +260,12 @@ #define CLKID_SPICC0_SCLK_DIV 257 #define CLKID_SPICC1_SCLK_SEL 259 #define CLKID_SPICC1_SCLK_DIV 260 +#define CLKID_NNA_AXI_CLK_SEL 262 +#define CLKID_NNA_AXI_CLK_DIV 263 +#define CLKID_NNA_CORE_CLK_SEL 265 +#define CLKID_NNA_CORE_CLK_DIV 266 -#define NR_CLKS 262 +#define NR_CLKS 268 /* include the CLKIDs that have been made part of the DT binding */ #include <dt-bindings/clock/g12a-clkc.h> |