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| author | Jerome Brunet <jbrunet@baylibre.com> | 2017-02-14 02:13:55 +0300 |
|---|---|---|
| committer | Jerome Brunet <jbrunet@baylibre.com> | 2017-04-07 17:50:44 +0300 |
| commit | 59e85335dda9826284a1f0f160ea8f10b59e0568 (patch) | |
| tree | 6cf1f00b7d262230abc34f8cce4cb1c2b9fc25d7 /drivers/clk/meson/clkc.h | |
| parent | a70c6e06ed7c8c84612c7e3dada9d6895b65c70a (diff) | |
| download | linux-59e85335dda9826284a1f0f160ea8f10b59e0568.tar.xz | |
clk: meson: add audio clock divider support
The audio divider needs a specific clock divider driver.
With am mpll parent clock, which is able to provide a fairly precise rate,
the generic divider tends to select low value of the divider. In such case
the quality of the clock is very poor. For the same final rate, maximizing
the audio clock divider value and selecting the corresponding mpll rate
gives better results. This is what this driver aims to acheive. So far, so
good.
Cc: Hendrik v. Raven <hendrik@consetetur.de>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'drivers/clk/meson/clkc.h')
| -rw-r--r-- | drivers/clk/meson/clkc.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h index b0c9999d03de..d6feafe8bd6c 100644 --- a/drivers/clk/meson/clkc.h +++ b/drivers/clk/meson/clkc.h @@ -121,6 +121,14 @@ struct meson_clk_mpll { spinlock_t *lock; }; +struct meson_clk_audio_divider { + struct clk_hw hw; + void __iomem *base; + struct parm div; + u8 flags; + spinlock_t *lock; +}; + #define MESON_GATE(_name, _reg, _bit) \ struct clk_gate _name = { \ .reg = (void __iomem *) _reg, \ @@ -141,5 +149,7 @@ extern const struct clk_ops meson_clk_pll_ops; extern const struct clk_ops meson_clk_cpu_ops; extern const struct clk_ops meson_clk_mpll_ro_ops; extern const struct clk_ops meson_clk_mpll_ops; +extern const struct clk_ops meson_clk_audio_divider_ro_ops; +extern const struct clk_ops meson_clk_audio_divider_ops; #endif /* __CLKC_H */ |