diff options
author | mtk01761 <wendell.lin@mediatek.com> | 2019-08-19 12:21:41 +0300 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2019-09-09 19:37:30 +0300 |
commit | 710774e048614c761a39a98e8d0fa75f688c83b6 (patch) | |
tree | 301a488a06794dfe020f192d228fb8bc4ff0c998 /drivers/clk/mediatek/clk-mt6779-venc.c | |
parent | 85b18fe7049466cb15e7d33b51aa51854e0e05e7 (diff) | |
download | linux-710774e048614c761a39a98e8d0fa75f688c83b6.tar.xz |
clk: mediatek: Add MT6779 clock support
Add MT6779 clock support, include topckgen, apmixedsys,
infracfg, and subsystem clocks.
Signed-off-by: mtk01761 <wendell.lin@mediatek.com>
Link: https://lkml.kernel.org/r/1566206502-4347-11-git-send-email-mars.cheng@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mt6779-venc.c')
-rw-r--r-- | drivers/clk/mediatek/clk-mt6779-venc.c | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/drivers/clk/mediatek/clk-mt6779-venc.c b/drivers/clk/mediatek/clk-mt6779-venc.c new file mode 100644 index 000000000000..b41d1f859edc --- /dev/null +++ b/drivers/clk/mediatek/clk-mt6779-venc.c @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 MediaTek Inc. + * Author: Wendell Lin <wendell.lin@mediatek.com> + */ + +#include <linux/clk-provider.h> +#include <linux/platform_device.h> + +#include "clk-mtk.h" +#include "clk-gate.h" + +#include <dt-bindings/clock/mt6779-clk.h> + +static const struct mtk_gate_regs venc_cg_regs = { + .set_ofs = 0x0004, + .clr_ofs = 0x0008, + .sta_ofs = 0x0000, +}; + +#define GATE_VENC_I(_id, _name, _parent, _shift) \ + GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, \ + &mtk_clk_gate_ops_setclr_inv) + +static const struct mtk_gate venc_clks[] = { + GATE_VENC_I(CLK_VENC_GCON_LARB, "venc_larb", "venc_sel", 0), + GATE_VENC_I(CLK_VENC_GCON_VENC, "venc_venc", "venc_sel", 4), + GATE_VENC_I(CLK_VENC_GCON_JPGENC, "venc_jpgenc", "venc_sel", 8), + GATE_VENC_I(CLK_VENC_GCON_GALS, "venc_gals", "venc_sel", 28), +}; + +static const struct of_device_id of_match_clk_mt6779_venc[] = { + { .compatible = "mediatek,mt6779-vencsys", }, + {} +}; + +static int clk_mt6779_venc_probe(struct platform_device *pdev) +{ + struct clk_onecell_data *clk_data; + struct device_node *node = pdev->dev.of_node; + + clk_data = mtk_alloc_clk_data(CLK_VENC_GCON_NR_CLK); + + mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks), + clk_data); + + return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); +} + +static struct platform_driver clk_mt6779_venc_drv = { + .probe = clk_mt6779_venc_probe, + .driver = { + .name = "clk-mt6779-venc", + .of_match_table = of_match_clk_mt6779_venc, + }, +}; + +builtin_platform_driver(clk_mt6779_venc_drv); |