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| author | Paul Cercueil <paul@crapouillou.net> | 2019-06-11 21:07:54 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2019-06-26 01:43:15 +0300 |
| commit | 2ee93e3c953b7263c21ce61e7c42e33d0539bef9 (patch) | |
| tree | c6dd6351f5350bb9724f2fcc6f13a1b0335b5d22 /drivers/clk/ingenic/jz4740-cgu.c | |
| parent | dbc38ad0e7390162c500210f96ebf1d6a8738899 (diff) | |
| download | linux-2ee93e3c953b7263c21ce61e7c42e33d0539bef9.tar.xz | |
clk: ingenic: Handle setting the Low-Power Mode bit
The Low-Power Mode, when enabled, will make the "wait" MIPS instruction
suspend the system.
This is not really clock-related, but this bit happens to be in the
register set of the CGU.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/ingenic/jz4740-cgu.c')
| -rw-r--r-- | drivers/clk/ingenic/jz4740-cgu.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/ingenic/jz4740-cgu.c b/drivers/clk/ingenic/jz4740-cgu.c index e6b462f9bfe5..75651544cb30 100644 --- a/drivers/clk/ingenic/jz4740-cgu.c +++ b/drivers/clk/ingenic/jz4740-cgu.c @@ -22,6 +22,7 @@ #include <dt-bindings/clock/jz4740-cgu.h> #include <asm/mach-jz4740/clock.h> #include "cgu.h" +#include "pm.h" /* CGU register offsets */ #define CGU_REG_CPCCR 0x00 @@ -247,6 +248,8 @@ static void __init jz4740_cgu_init(struct device_node *np) retval = ingenic_cgu_register_clocks(cgu); if (retval) pr_err("%s: failed to register CGU Clocks\n", __func__); + + ingenic_cgu_register_syscore_ops(cgu); } CLK_OF_DECLARE(jz4740_cgu, "ingenic,jz4740-cgu", jz4740_cgu_init); |