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authorNikita Yushchenko <nikita.yoush@cogentembedded.com>2016-12-19 11:12:09 +0300
committerStephen Boyd <sboyd@codeaurora.org>2017-01-10 03:06:41 +0300
commitc77cbdd11b688fa0d1fbb140473dad4bc47cf5e6 (patch)
tree23b560a7007fe4bcbd53742b28db46bd3f090b06 /drivers/clk/imx/clk.h
parent6205406cf6f282d622f31de25036e6d1ab3a2ff5 (diff)
downloadlinux-c77cbdd11b688fa0d1fbb140473dad4bc47cf5e6.tar.xz
clk: imx: pllv3: support fractional multiplier on vf610 PLL1/PLL2
On vf610, PLL1 and PLL2 have registers to configure fractional part of frequency multiplier. This patch adds support for these registers. This fixes "fast system clock" issue on boards where bootloader sets fractional multiplier for PLL1. Suggested-by: Andrey Smirnov <andrew.smirnov@gmail.com> CC: Chris Healy <cphealy@gmail.com> Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Tested-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/imx/clk.h')
-rw-r--r--drivers/clk/imx/clk.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 4afad3b96a61..e1f5e425db73 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -34,6 +34,7 @@ enum imx_pllv3_type {
IMX_PLLV3_AV,
IMX_PLLV3_ENET,
IMX_PLLV3_ENET_IMX7,
+ IMX_PLLV3_SYS_VF610,
};
struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,