diff options
| author | A.s. Dong <aisheng.dong@nxp.com> | 2018-11-14 16:01:47 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-12-03 22:31:32 +0300 |
| commit | 9fcb6be3b6c994f275761b22800e4244f610bdc5 (patch) | |
| tree | c2519ef24df87c69edffa201947c55dcd3b6a098 /drivers/clk/imx/clk.h | |
| parent | d9a8f950b296729b88d7139904cac5fd6d0a5261 (diff) | |
| download | linux-9fcb6be3b6c994f275761b22800e4244f610bdc5.tar.xz | |
clk: imx: add pfdv2 support
The pfdv2 is designed for PLL Fractional Divide (PFD) observed in System
Clock Generation (SCG) module in IMX ULP SoC series. e.g. i.MX7ULP.
NOTE pfdv2 can only be operated when clk is gated.
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Anson Huang <Anson.Huang@nxp.com>
Cc: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
[sboyd@kernel.org: Include clk.h for sparse warnings]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk.h')
| -rw-r--r-- | drivers/clk/imx/clk.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 3364e080ccdf..153d9a436ded 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -60,6 +60,9 @@ struct clk *imx_clk_gate_exclusive(const char *name, const char *parent, struct clk *imx_clk_pfd(const char *name, const char *parent_name, void __iomem *reg, u8 idx); +struct clk_hw *imx_clk_pfdv2(const char *name, const char *parent_name, + void __iomem *reg, u8 idx); + struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, void __iomem *reg, u8 shift, u8 width, void __iomem *busy_reg, u8 busy_shift); |