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authortianshuliang <tianshuliang@hisilicon.com>2018-03-05 10:01:31 +0300
committerShawn Guo <shawnguo@kernel.org>2018-03-12 10:56:40 +0300
commit811f67cc16ec76c3953ca1b9d7c34e3f0c17f779 (patch)
tree0039cb365be56dadac52263dc5f6bb7413e99495 /drivers/clk/hisilicon/Makefile
parent80f8ce589517c478abdae07a758b37b362886cb2 (diff)
downloadlinux-811f67cc16ec76c3953ca1b9d7c34e3f0c17f779.tar.xz
clk: hisilicon: add hisi phase clock support
Add a phase clock type for HiSilicon SoCs,which supports clk_set_phase operation. Signed-off-by: tianshuliang <tianshuliang@hisilicon.com> Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'drivers/clk/hisilicon/Makefile')
-rw-r--r--drivers/clk/hisilicon/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile
index 4806fc2cb4ac..2a714c0f9657 100644
--- a/drivers/clk/hisilicon/Makefile
+++ b/drivers/clk/hisilicon/Makefile
@@ -3,7 +3,7 @@
# Hisilicon Clock specific Makefile
#
-obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o
+obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o
obj-$(CONFIG_ARCH_HI3xxx) += clk-hi3620.o
obj-$(CONFIG_ARCH_HIP04) += clk-hip04.o