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author | Jiancheng Xue <xuejiancheng@hisilicon.com> | 2016-04-23 10:40:28 +0300 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-05-06 21:13:29 +0300 |
commit | 25824d52caa8e614b695a7197a8edde19f5b02ad (patch) | |
tree | 5f183fec712cdf5802e858d4112483eaf98f6ec8 /drivers/clk/hisilicon/Makefile | |
parent | f55532a0c0b8bb6148f4e07853b876ef73bc69ca (diff) | |
download | linux-25824d52caa8e614b695a7197a8edde19f5b02ad.tar.xz |
reset: hisilicon: add reset controller driver for hisilicon SOCs
In most of hisilicon SOCs, reset controller and clock provider are
combined together as a block named CRG (Clock and Reset Generator).
This patch mainly implements the reset function.
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/hisilicon/Makefile')
-rw-r--r-- | drivers/clk/hisilicon/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile index 74dba31590f9..c03775350e63 100644 --- a/drivers/clk/hisilicon/Makefile +++ b/drivers/clk/hisilicon/Makefile @@ -8,4 +8,5 @@ obj-$(CONFIG_ARCH_HI3xxx) += clk-hi3620.o obj-$(CONFIG_ARCH_HIP04) += clk-hip04.o obj-$(CONFIG_ARCH_HIX5HD2) += clk-hix5hd2.o obj-$(CONFIG_COMMON_CLK_HI6220) += clk-hi6220.o +obj-$(CONFIG_RESET_HISI) += reset.o obj-$(CONFIG_STUB_CLK_HI6220) += clk-hi6220-stub.o |