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authorJ Keerthy <j-keerthy@ti.com>2013-07-23 10:35:37 +0400
committerMike Turquette <mturquette@linaro.org>2014-01-18 00:35:31 +0400
commit3cf467a9969db8297dcf783c5b09b0df8fda863b (patch)
treebc17da1cc3f192ade4e939e0ae1193a9a66a0bb0 /drivers/clk/clk-xgene.c
parent62125a46cd717ad8fa6a64d260d46a0a108e6222 (diff)
downloadlinux-3cf467a9969db8297dcf783c5b09b0df8fda863b.tar.xz
CLK: TI: DRA7: Add APLL support
The patch adds support for DRA7 PCIe APLL. The APLL sources the optional functional clocks for PCIe module. APLL stands for Analog PLL. This is different when comapred with DPLL meaning Digital PLL, the phase detection is done using an analog circuit. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/clk-xgene.c')
0 files changed, 0 insertions, 0 deletions