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| author | Chen-Yu Tsai <wens@csie.org> | 2017-02-14 06:35:22 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-03-06 09:36:04 +0300 |
| commit | ac8616e4c81dded650dfade49a7da283565d37ce (patch) | |
| tree | 84ff6cfb9d1b96767417e6b09502c7fab5394b41 /drivers/clk/clk-fractional-divider.c | |
| parent | c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201 (diff) | |
| download | linux-ac8616e4c81dded650dfade49a7da283565d37ce.tar.xz | |
clk: sunxi-ng: mp: Adjust parent rate for pre-dividers
The MP style clocks support an mux with pre-dividers. While the driver
correctly accounted for them in the .determine_rate callback, it did
not in the .recalc_rate and .set_rate callbacks.
This means when calculating the factors in the .set_rate callback, they
would be off by a factor of the active pre-divider. Same goes for
reading back the clock rate after it is set.
Cc: stable@vger.kernel.org
Fixes: 2ab836db5097 ("clk: sunxi-ng: Add M-P factor clock support")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/clk-fractional-divider.c')
0 files changed, 0 insertions, 0 deletions