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author | Kevin Hilman <khilman@linaro.org> | 2015-06-25 07:32:26 +0300 |
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committer | Kevin Hilman <khilman@linaro.org> | 2015-06-25 07:32:26 +0300 |
commit | 32270e805a1e0baf39aa040177ef1896f03b7266 (patch) | |
tree | 89f8ac72b98d4f37377fa58f3fa9804dd32f2350 /drivers/clk/berlin/bg2q.c | |
parent | 39e79b873e1bafc5637a1a704495b01edbe469b1 (diff) | |
parent | 4af34b572a85c44c55491a10693535a79627c478 (diff) | |
download | linux-32270e805a1e0baf39aa040177ef1896f03b7266.tar.xz |
Merge tag 'armsoc-drivers' into test-merge
ARM: SoC: driver updates for v4.2
Some of these are for drivers/soc, where we're now putting
SoC-specific drivers these days. Some are for other driver subsystems
where we have received acks from the appropriate maintainers.
Some highlights:
- simple-mfd: document DT bindings and misc updates
- migrate mach-berlin to simple-mfd for clock, pinctrl and reset
- memory: support for Tegra132 SoC
- memory: introduce tegra EMC driver for scaling memory frequency
- misc. updates for ARM CCI and CCN busses
Conflicts:
arch/arm64/boot/dts/arm/juno-motherboard.dtsi
Trivial add/add conflict with our dt branch.
Resolution: take both sides.
# gpg: Signature made Wed Jun 24 21:32:17 2015 PDT using RSA key ID D3FBC665
# gpg: Good signature from "Kevin Hilman <khilman@deeprootsystems.com>"
# gpg: aka "Kevin Hilman <khilman@linaro.org>"
# gpg: aka "Kevin Hilman <khilman@kernel.org>"
# Conflicts:
# arch/arm64/boot/dts/arm/juno-motherboard.dtsi
Diffstat (limited to 'drivers/clk/berlin/bg2q.c')
-rw-r--r-- | drivers/clk/berlin/bg2q.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c index 440ef81ab15c..221f40c2b850 100644 --- a/drivers/clk/berlin/bg2q.c +++ b/drivers/clk/berlin/bg2q.c @@ -290,18 +290,19 @@ static const struct berlin2_gate_data bg2q_gates[] __initconst = { static void __init berlin2q_clock_setup(struct device_node *np) { + struct device_node *parent_np = of_get_parent(np); const char *parent_names[9]; struct clk *clk; int n; - gbase = of_iomap(np, 0); + gbase = of_iomap(parent_np, 0); if (!gbase) { pr_err("%s: Unable to map global base\n", np->full_name); return; } /* BG2Q CPU PLL is not part of global registers */ - cpupll_base = of_iomap(np, 1); + cpupll_base = of_iomap(parent_np, 1); if (!cpupll_base) { pr_err("%s: Unable to map cpupll base\n", np->full_name); iounmap(gbase); @@ -384,5 +385,5 @@ bg2q_fail: iounmap(cpupll_base); iounmap(gbase); } -CLK_OF_DECLARE(berlin2q_clock, "marvell,berlin2q-chip-ctrl", +CLK_OF_DECLARE(berlin2q_clk, "marvell,berlin2q-clk", berlin2q_clock_setup); |