diff options
| author | Martin Sperl <kernel@martin.sperl.org> | 2016-02-29 14:39:20 +0300 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2016-03-17 20:42:17 +0300 |
| commit | 997f16bd5d2e9b3456027f96fcadfe1e2bf12f4e (patch) | |
| tree | 95fde6533adaaa0f0953c037285897d973eac394 /drivers/clk/bcm | |
| parent | ec36a5c6682fdd5328abf15c3c67281bed0241d7 (diff) | |
| download | linux-997f16bd5d2e9b3456027f96fcadfe1e2bf12f4e.tar.xz | |
clk: bcm2835: divider value has to be 1 or more
Current clamping of a normal divider allows a value < 1 to be valid.
A divider of < 1 would actually only be possible if we had a PLL...
So this patch clamps the divider to 1.
Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the
audio domain clocks")
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/clk/bcm')
| -rw-r--r-- | drivers/clk/bcm/clk-bcm2835.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index a39f8a7b6410..1fee1fd87cea 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -1190,8 +1190,9 @@ static u32 bcm2835_clock_choose_div(struct clk_hw *hw, div += unused_frac_mask + 1; div &= ~unused_frac_mask; - /* Clamp to the limits. */ - div = max(div, unused_frac_mask + 1); + /* clamp to min divider of 1 */ + div = max_t(u32, div, 1 << CM_DIV_FRAC_BITS); + /* clamp to the highest possible fractional divider */ div = min_t(u32, div, GENMASK(data->int_bits + CM_DIV_FRAC_BITS - 1, CM_DIV_FRAC_BITS - data->frac_bits)); |