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authorThomas Rohwer <tr@tng.de>2007-11-19 05:54:24 +0300
committerTejun Heo <htejun@gmail.com>2007-11-19 06:28:11 +0300
commit8d8ef2fb931d1035e1f02095086cfd3f78eafe3f (patch)
tree7544956b7a74383dd3c34a3072028291059dd7b9 /drivers/ata
parent00242ec87608d7a0ed989e54333f3fc8f3d665b0 (diff)
downloadlinux-8d8ef2fb931d1035e1f02095086cfd3f78eafe3f.tar.xz
ata_piix: only enable the first port on apple macbook pro
ICH8M on apple macbook pro occasionally locks up completely during PCS initialization if ports other than the first one are enabled. Add a separate controller ID and only enable the first port. tj: commit description added and patch updated to fit with the previous controller ID update. Signed-off-by: Thomas Rohwer <tr@tng.de> Signed-off-by: Tejun Heo <htejun@gmail.com>
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/ata_piix.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 77fea05990d2..d5ff1d89bea3 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -130,6 +130,7 @@ enum {
ich6m_sata_ahci,
ich8_sata_ahci,
ich8_2port_sata,
+ ich8m_apple_sata_ahci, /* locks up on second port enable */
tolapai_sata_ahci,
/* constants for mapping table */
@@ -242,6 +243,8 @@ static const struct pci_device_id piix_pci_tbl[] = {
{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* Mobile SATA Controller IDE (ICH8M) */
{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
+ /* Mobile SATA Controller IDE (ICH8M), Apple */
+ { 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata_ahci },
/* SATA Controller IDE (ICH9) */
{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
/* SATA Controller IDE (ICH9) */
@@ -449,6 +452,18 @@ static const struct piix_map_db ich8_2port_map_db = {
},
};
+static const struct piix_map_db ich8m_apple_map_db = {
+ .mask = 0x3,
+ .port_enable = 0x1,
+ .map = {
+ /* PM PS SM SS MAP */
+ { P0, NA, NA, NA }, /* 00b */
+ { RV, RV, RV, RV },
+ { P0, P2, IDE, IDE }, /* 10b */
+ { RV, RV, RV, RV },
+ },
+};
+
static const struct piix_map_db tolapai_map_db = {
.mask = 0x3,
.port_enable = 0x3,
@@ -468,6 +483,7 @@ static const struct piix_map_db *piix_map_db_table[] = {
[ich6m_sata_ahci] = &ich6m_map_db,
[ich8_sata_ahci] = &ich8_map_db,
[ich8_2port_sata] = &ich8_2port_map_db,
+ [ich8m_apple_sata_ahci] = &ich8m_apple_map_db,
[tolapai_sata_ahci] = &tolapai_map_db,
};
@@ -595,6 +611,18 @@ static struct ata_port_info piix_port_info[] = {
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
+
+ [ich8m_apple_sata_ahci] =
+ {
+ .sht = &piix_sht,
+ .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SCR |
+ PIIX_FLAG_AHCI,
+ .pio_mask = 0x1f, /* pio0-4 */
+ .mwdma_mask = 0x07, /* mwdma0-2 */
+ .udma_mask = ATA_UDMA6,
+ .port_ops = &piix_sata_ops,
+ },
+
};
static struct pci_bits piix_enable_bits[] = {