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authorSakari Ailus <sakari.ailus@linux.intel.com>2020-08-25 23:23:43 +0300
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2020-12-07 17:59:10 +0300
commit3e2db036c9b706e68016db7610c333ed926425be (patch)
tree51b07ca992dd5d68a168a80df079115717926805 /crypto/sm4_generic.c
parent8030aa4f9c512ecf8b91b37c88ab6b479e71c8a4 (diff)
downloadlinux-3e2db036c9b706e68016db7610c333ed926425be.tar.xz
media: ccs-pll: Split off VT subtree calculation
Split off the VT sub clock tree calculation from the rest, into its own function. Also call the op_pll_fr argument pll_fr, since soon these may not be OP tree values. This paves way for additional features in the future such as dual PLL support. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'crypto/sm4_generic.c')
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