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authorTirumalesh Chalamarla <tchalamarla@caviumnetworks.com>2015-08-19 02:40:30 +0300
committerWill Deacon <will.deacon@arm.com>2015-10-14 15:43:51 +0300
commit668b4ada1cdf406dac9f72503fa2f69f31bed0c5 (patch)
tree6b59f23323ffe58fa9023e164b4ee94351175b2b /crypto/chainiv.c
parent077124c98da3aa5aaf498fd0980ed14eaf777c09 (diff)
downloadlinux-668b4ada1cdf406dac9f72503fa2f69f31bed0c5.tar.xz
iommu/arm-smmu: ThunderX mis-extends 64bit registers
The SMMU architecture defines two different behaviors when 64-bit registers are written with 32-bit writes. The first behavior causes zero extension into the upper 32-bits. The second behavior splits a 64-bit register into "normal" 32-bit register pairs. On some buggy implementations, registers incorrectly zero extended when they should instead behave as normal 32-bit register pairs. Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> [will: removed redundant macro parameters] Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'crypto/chainiv.c')
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