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author | Yixun Lan <yixun.lan@amlogic.com> | 2018-03-28 06:01:30 +0300 |
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committer | Kevin Hilman <khilman@baylibre.com> | 2018-05-23 21:31:54 +0300 |
commit | 9adda3534faad306c3d5351c5b87d26fea9767be (patch) | |
tree | d0b5373da6e31b4abb8707b69b3049691c6f8087 /certs/Makefile | |
parent | e03421ece6a6044c498e3f952c41b0d99d7ca51a (diff) | |
download | linux-9adda3534faad306c3d5351c5b87d26fea9767be.tar.xz |
ARM64: dts: meson: fix clock source of the pclk for UART_AO
>From the hardware perspective, the actual pclk of the AO uarts
is the corresponding clkc_ao uart gate, not the main clock controller clk81.
This was not problem so far, because the uart_gate had
the CLK_IGNORE_UNUSED flag, which kept the gate open.
We plan to remove the CLK_IGNORE_UNUSED flag in another patch,
but before doing that, we need to fix the clock in the DTS file.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'certs/Makefile')
0 files changed, 0 insertions, 0 deletions