diff options
| author | Andy Hu <andy.hu@starfivetech.com> | 2023-07-13 03:42:02 +0300 |
|---|---|---|
| committer | Andy Hu <andy.hu@starfivetech.com> | 2023-07-13 03:42:02 +0300 |
| commit | aa611547935bab2e31d94c457b918214ba48a1c0 (patch) | |
| tree | 77b90893b07d2a894520be0e29ec167aad674188 /arch | |
| parent | 066d708649800a06211070135aac0ca3d25a4fc2 (diff) | |
| parent | 0810df6ea70a2723ba900cfae52d6db986bd26a6 (diff) | |
| download | linux-aa611547935bab2e31d94c457b918214ba48a1c0.tar.xz | |
Merge tag 'JH7110_515_SDK_v5.4.0' into vf2-515-devel
Diffstat (limited to 'arch')
| -rwxr-xr-x | arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 15 | ||||
| -rwxr-xr-x | arch/riscv/boot/dts/starfive/jh7110.dtsi | 11 |
2 files changed, 13 insertions, 13 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi index 6f5fc7ae24b3..987fbba5a587 100755 --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi @@ -54,20 +54,19 @@ reusable; size = <0x0 0x20000000>; alignment = <0x0 0x1000>; - alloc-ranges = <0x0 0x80000000 0x0 0x20000000>; + alloc-ranges = <0x0 0x70000000 0x0 0x20000000>; linux,cma-default; }; e24_mem: e24@c0000000 { - no-map; - reg = <0x0 0xc0110000 0x0 0xf0000>; + reg = <0x0 0x6ce00000 0x0 0x1600000>; }; xrp_reserved: xrpbuffer@f0000000 { - reg = <0x0 0xf0000000 0x0 0x01ffffff - 0x0 0xf2000000 0x0 0x00001000 - 0x0 0xf2001000 0x0 0x00fff000 - 0x0 0xf3000000 0x0 0x00001000>; + reg = <0x0 0x69c00000 0x0 0x01ffffff + 0x0 0x6bc00000 0x0 0x00001000 + 0x0 0x6bc01000 0x0 0x00fff000 + 0x0 0x6cc00000 0x0 0x00001000>; }; }; @@ -741,6 +740,7 @@ }; &co_process { + memory-region = <&e24_mem>; status = "okay"; }; @@ -752,5 +752,6 @@ }; &xrp { + memory-region = <&xrp_reserved>; status = "okay"; }; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 83677f5a87ba..b00c8a5d5c7a 100755 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -641,7 +641,7 @@ snps,num-hs-if = <56>; snps,block-size = <65536 65536 65536 65536>; snps,priority = <0 1 2 3>; - snps,axi-max-burst-len = <16>; + snps,axi-max-burst-len = <15>; status = "disabled"; }; @@ -1810,8 +1810,8 @@ co_process: e24@0 { compatible = "starfive,e24"; dma-coherent; - reg = <0x0 0xc0110000 0x0 0x00001000>, - <0x0 0xc0111000 0x0 0x0001f000>; + reg = <0x0 0x6e210000 0x0 0x00001000>, + <0x0 0x6e211000 0x0 0x0003f000>; reg-names = "ecmd", "espace"; clocks = <&clkgen JH7110_E2_RTC_CLK>, <&clkgen JH7110_E2_CLK_CORE>, @@ -1827,7 +1827,7 @@ mboxes = <&mailbox_contrl0 0 2>,<&mailbox_contrl0 2 0>; #address-cells = <1>; #size-cells = <1>; - ranges = <0xc0000000 0x0 0xc0000000 0x200000>; + ranges = <0x6ce00000 0x0 0x6ce00000 0x1600000>; status = "disabled"; dsp@0 {}; }; @@ -1837,7 +1837,6 @@ dma-coherent; reg = <0x0 0x10230000 0x0 0x00010000 0x0 0x10240000 0x0 0x00010000>; - memory-region = <&xrp_reserved>; clocks = <&clkgen JH7110_HIFI4_CLK_CORE>; clock-names = "core_clk"; resets = <&rstgen RSTN_U0_HIFI4_CORE>, @@ -1848,7 +1847,7 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x40000000 0x0 0x20000000 0x040000 - 0xf0000000 0x0 0xf0000000 0x03000000>; + 0x69c00000 0x0 0x69c00000 0x03000000>; status = "disabled"; dsp@0 { }; |