diff options
| author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2021-04-22 20:31:48 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-04-23 01:08:35 +0300 |
| commit | 9ba585cc5b56ea14a453ba6be9bdb984ed33471a (patch) | |
| tree | fa41d0a3990c59343d04fbd9d581d10d6f0a9dc7 /arch | |
| parent | 27537929f30d3136a71ef29db56127a33c92dad7 (diff) | |
| download | linux-9ba585cc5b56ea14a453ba6be9bdb984ed33471a.tar.xz | |
ARM: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E
UniPhier PXs2 boards have RTL8211E ethernet phy, and the phy have the RX/TX
delays of RGMII interface using pull-ups on the RXDLY and TXDLY pins.
After the commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), the delays are working correctly, however, "rgmii" means
no delay and the phy doesn't work. So need to set the phy-mode to
"rgmii-id" to show that RX/TX delays are enabled.
Fixes: e3cc931921d2 ("ARM: dts: uniphier: add AVE ethernet node")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/uniphier-pxs2.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index b0b15c97306b..e81e5937a60a 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -583,7 +583,7 @@ clocks = <&sys_clk 6>; reset-names = "ether"; resets = <&sys_rst 6>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; local-mac-address = [00 00 00 00 00 00]; socionext,syscon-phy-mode = <&soc_glue 0>; |