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authorFuad Tabba <tabba@google.com>2021-05-24 11:30:00 +0300
committerWill Deacon <will@kernel.org>2021-05-25 21:27:49 +0300
commit393239be1ba69dcd29be504ffe14938509795821 (patch)
tree0e56a928781307419a789e4026964d651fd5959c /arch
parent8c28d52ccd1d6e3a5aca8a37e465a5f8b77edbc1 (diff)
downloadlinux-393239be1ba69dcd29be504ffe14938509795821.tar.xz
arm64: Fix cache maintenance function comments
Fix and expand comments for the cache maintenance functions in cacheflush.h. Adds comments to functions that weren't described before. Explains what the functions do using Arm Architecture Reference Manual terminology. No functional change intended. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Fuad Tabba <tabba@google.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20210524083001.2586635-18-tabba@google.com Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/include/asm/cacheflush.h47
1 files changed, 30 insertions, 17 deletions
diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h
index 70b389a8dea5..26617df1fa45 100644
--- a/arch/arm64/include/asm/cacheflush.h
+++ b/arch/arm64/include/asm/cacheflush.h
@@ -30,31 +30,44 @@
* the implementation assumes non-aliasing VIPT D-cache and (aliasing)
* VIPT I-cache.
*
- * flush_icache_range(start, end)
+ * All functions below apply to the interval [start, end)
+ * - start - virtual start address (inclusive)
+ * - end - virtual end address (exclusive)
*
- * Ensure coherency between the I-cache and the D-cache in the
- * region described by start, end.
- * - start - virtual start address
- * - end - virtual end address
+ * __flush_icache_range(start, end)
*
- * invalidate_icache_range(start, end)
- *
- * Invalidate the I-cache in the region described by start, end.
- * - start - virtual start address
- * - end - virtual end address
+ * Ensure coherency between the I-cache and the D-cache region to
+ * the Point of Unification.
*
* __flush_cache_user_range(start, end)
*
- * Ensure coherency between the I-cache and the D-cache in the
- * region described by start, end.
- * - start - virtual start address
- * - end - virtual end address
+ * Ensure coherency between the I-cache and the D-cache region to
+ * the Point of Unification.
+ * Use only if the region might access user memory.
+ *
+ * invalidate_icache_range(start, end)
+ *
+ * Invalidate I-cache region to the Point of Unification.
*
* __flush_dcache_area(start, end)
*
- * Ensure that the data held in page is written back.
- * - start - virtual start address
- * - end - virtual end address
+ * Clean and invalidate D-cache region to the Point of Coherency.
+ *
+ * __inval_dcache_area(start, end)
+ *
+ * Invalidate D-cache region to the Point of Coherency.
+ *
+ * __clean_dcache_area_poc(start, end)
+ *
+ * Clean D-cache region to the Point of Coherency.
+ *
+ * __clean_dcache_area_pop(start, end)
+ *
+ * Clean D-cache region to the Point of Persistence.
+ *
+ * __clean_dcache_area_pou(start, end)
+ *
+ * Clean D-cache region to the Point of Unification.
*/
extern void __flush_icache_range(unsigned long start, unsigned long end);
extern void invalidate_icache_range(unsigned long start, unsigned long end);